From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: mark.cave-ayland@ilande.co.uk, qemu-ppc@nongnu.org,
david@gibson.dropbear.id.au
Subject: [Qemu-devel] [PATCH 00/34] tcg, target/ppc vector improvements
Date: Mon, 17 Dec 2018 22:38:37 -0800 [thread overview]
Message-ID: <20181218063911.2112-1-richard.henderson@linaro.org> (raw)
This implements some of the things that I talked about with Mark
this morning / yesterday. In particular:
(0) Implement expanders for nand, nor, eqv logical operations.
(1) Implement saturating arithmetic for the tcg backend.
While I had expanders for these, they always went to helpers.
It's easy enough to expand byte and half-word operations for x86.
Beyond that, 32 and 64-bit operations can be expanded with integers.
(2) Implement minmax arithmetic for the tcg backend.
While I had integral minmax operations, I had not yet added
any vector expanders for this. (The integral stuff came in
for atomic minmax.)
(3) Trivial conversions to minmax for target/arm.
(4) Patches 11-18 are identical to Mark's.
(5) Patches 19-25 implement splat and logicals for VMX and VSX.
VSX is no more difficult than VMX for these. It does seem to be
just about everything that we can do for VSX at the momement.
(6) Patches 26-33 implement saturating arithmetic for VMX.
(7) Patch 34 implements minmax arithmetic for VMX.
I've tested the new operations via aarch64 guest, as that's the set
of risu test cases I've got handy. The rest is untested so far.
r~
Mark Cave-Ayland (8):
target/ppc: introduce get_fpr() and set_fpr() helpers for FP register
access
target/ppc: introduce get_avr64() and set_avr64() helpers for VMX
register access
target/ppc: introduce get_cpu_vsr{l,h}() and set_cpu_vsr{l,h}()
helpers for VSR register access
target/ppc: switch FPR, VMX and VSX helpers to access data directly
from cpu_env
target/ppc: merge ppc_vsr_t and ppc_avr_t union types
target/ppc: move FP and VMX registers into aligned vsr register array
target/ppc: convert VMX logical instructions to use vector operations
target/ppc: convert vaddu[b,h,w,d] and vsubu[b,h,w,d] over to use
vector operations
Richard Henderson (26):
tcg: Add logical simplifications during gvec expand
target/arm: Rely on optimization within tcg_gen_gvec_or
tcg: Add gvec expanders for nand, nor, eqv
tcg: Add write_aofs to GVecGen4
tcg: Add opcodes for vector saturated arithmetic
tcg/i386: Implement vector saturating arithmetic
tcg: Add opcodes for vector minmax arithmetic
tcg/i386: Implement vector minmax arithmetic
target/arm: Use vector minmax expanders for aarch64
target/arm: Use vector minmax expanders for aarch32
target/ppc: convert vspltis[bhw] to use vector operations
target/ppc: convert vsplt[bhw] to use vector operations
target/ppc: nand, nor, eqv are now generic vector operations
target/ppc: convert VSX logical operations to vector operations
target/ppc: convert xxspltib to vector operations
target/ppc: convert xxspltw to vector operations
target/ppc: convert xxsel to vector operations
target/ppc: Pass integer to helper_mtvscr
target/ppc: Use helper_mtvscr for reset and gdb
target/ppc: Remove vscr_nj and vscr_sat
target/ppc: Add helper_mfvscr
target/ppc: Use mtvscr/mfvscr for vmstate
target/ppc: Add set_vscr_sat
target/ppc: Split out VSCR_SAT to a vector field
target/ppc: convert vadd*s and vsub*s to vector operations
target/ppc: convert vmin* and vmax* to vector operations
accel/tcg/tcg-runtime.h | 23 +
target/ppc/cpu.h | 30 +-
target/ppc/helper.h | 57 +-
target/ppc/internal.h | 29 +-
tcg/aarch64/tcg-target.h | 2 +
tcg/i386/tcg-target.h | 2 +
tcg/tcg-op-gvec.h | 18 +
tcg/tcg-op.h | 11 +
tcg/tcg-opc.h | 8 +
tcg/tcg.h | 2 +
accel/tcg/tcg-runtime-gvec.c | 257 +++++++++
linux-user/ppc/signal.c | 24 +-
target/arm/translate-a64.c | 41 +-
target/arm/translate-sve.c | 6 +-
target/arm/translate.c | 37 +-
target/ppc/arch_dump.c | 15 +-
target/ppc/gdbstub.c | 8 +-
target/ppc/int_helper.c | 194 +++----
target/ppc/machine.c | 116 +++-
target/ppc/monitor.c | 4 +-
target/ppc/translate.c | 74 ++-
target/ppc/translate/dfp-impl.inc.c | 2 +-
target/ppc/translate/fp-impl.inc.c | 490 ++++++++++++----
target/ppc/translate/vmx-impl.inc.c | 349 +++++++-----
target/ppc/translate/vsx-impl.inc.c | 834 +++++++++++++++++++---------
target/ppc/translate_init.inc.c | 31 +-
tcg/i386/tcg-target.inc.c | 106 ++++
tcg/tcg-op-gvec.c | 305 ++++++++--
tcg/tcg-op-vec.c | 75 ++-
tcg/tcg.c | 10 +
30 files changed, 2275 insertions(+), 885 deletions(-)
--
2.17.2
next reply other threads:[~2018-12-18 6:40 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-18 6:38 Richard Henderson [this message]
2018-12-18 6:38 ` [Qemu-devel] [PATCH 01/34] tcg: Add logical simplifications during gvec expand Richard Henderson
2018-12-19 5:36 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 02/34] target/arm: Rely on optimization within tcg_gen_gvec_or Richard Henderson
2018-12-19 5:37 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 03/34] tcg: Add gvec expanders for nand, nor, eqv Richard Henderson
2018-12-19 5:39 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 04/34] tcg: Add write_aofs to GVecGen4 Richard Henderson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 05/34] tcg: Add opcodes for vector saturated arithmetic Richard Henderson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 06/34] tcg/i386: Implement vector saturating arithmetic Richard Henderson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 07/34] tcg: Add opcodes for vector minmax arithmetic Richard Henderson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 08/34] tcg/i386: Implement " Richard Henderson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 09/34] target/arm: Use vector minmax expanders for aarch64 Richard Henderson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 10/34] target/arm: Use vector minmax expanders for aarch32 Richard Henderson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 11/34] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access Richard Henderson
2018-12-19 6:15 ` David Gibson
2018-12-19 12:29 ` Mark Cave-Ayland
2018-12-20 16:52 ` Mark Cave-Ayland
2018-12-18 6:38 ` [Qemu-devel] [PATCH 12/34] target/ppc: introduce get_avr64() and set_avr64() helpers for VMX " Richard Henderson
2018-12-19 6:15 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 13/34] target/ppc: introduce get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}() helpers for VSR " Richard Henderson
2018-12-19 6:17 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 14/34] target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env Richard Henderson
2018-12-19 6:20 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 15/34] target/ppc: merge ppc_vsr_t and ppc_avr_t union types Richard Henderson
2018-12-19 6:21 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 16/34] target/ppc: move FP and VMX registers into aligned vsr register array Richard Henderson
2018-12-19 6:27 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 17/34] target/ppc: convert VMX logical instructions to use vector operations Richard Henderson
2018-12-19 6:29 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 18/34] target/ppc: convert vaddu[b, h, w, d] and vsubu[b, h, w, d] over " Richard Henderson
2018-12-19 6:29 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 19/34] target/ppc: convert vspltis[bhw] " Richard Henderson
2018-12-19 6:31 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 20/34] target/ppc: convert vsplt[bhw] " Richard Henderson
2018-12-19 6:32 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 21/34] target/ppc: nand, nor, eqv are now generic " Richard Henderson
2018-12-19 6:32 ` David Gibson
2018-12-18 6:38 ` [Qemu-devel] [PATCH 22/34] target/ppc: convert VSX logical operations to " Richard Henderson
2018-12-19 6:33 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 23/34] target/ppc: convert xxspltib " Richard Henderson
2018-12-19 6:34 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 24/34] target/ppc: convert xxspltw " Richard Henderson
2018-12-19 6:35 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 25/34] target/ppc: convert xxsel " Richard Henderson
2018-12-19 6:35 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 26/34] target/ppc: Pass integer to helper_mtvscr Richard Henderson
2018-12-19 6:37 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 27/34] target/ppc: Use helper_mtvscr for reset and gdb Richard Henderson
2018-12-19 6:38 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 28/34] target/ppc: Remove vscr_nj and vscr_sat Richard Henderson
2018-12-19 6:38 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 29/34] target/ppc: Add helper_mfvscr Richard Henderson
2018-12-19 6:39 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 30/34] target/ppc: Use mtvscr/mfvscr for vmstate Richard Henderson
2018-12-19 6:40 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 31/34] target/ppc: Add set_vscr_sat Richard Henderson
2018-12-19 6:40 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 32/34] target/ppc: Split out VSCR_SAT to a vector field Richard Henderson
2018-12-19 6:41 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 33/34] target/ppc: convert vadd*s and vsub*s to vector operations Richard Henderson
2018-12-19 6:42 ` David Gibson
2018-12-18 6:39 ` [Qemu-devel] [PATCH 34/34] target/ppc: convert vmin* and vmax* " Richard Henderson
2018-12-19 6:42 ` David Gibson
2018-12-18 9:49 ` [Qemu-devel] [PATCH 00/34] tcg, target/ppc vector improvements Mark Cave-Ayland
2018-12-18 14:51 ` Mark Cave-Ayland
2018-12-18 15:07 ` Richard Henderson
2018-12-18 15:22 ` Mark Cave-Ayland
2018-12-18 15:05 ` Mark Cave-Ayland
2018-12-18 15:17 ` Richard Henderson
2018-12-18 15:26 ` Mark Cave-Ayland
2018-12-18 16:16 ` Richard Henderson
2019-01-03 14:58 ` Mark Cave-Ayland
2019-01-03 18:31 ` Mark Cave-Ayland
2019-01-04 22:33 ` Richard Henderson
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