From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, gkurz@redhat.com,
lvivier@redhat.com, clg@kaod.org,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 22/40] spapr: export and rename the xics_max_server_number() routine
Date: Fri, 21 Dec 2018 16:45:48 +1100 [thread overview]
Message-ID: <20181221054606.22007-23-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20181221054606.22007-1-david@gibson.dropbear.id.au>
From: Cédric Le Goater <clg@kaod.org>
The XIVE sPAPR IRQ backend will use it to define the number of ENDs of
the IC controller.
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
hw/ppc/spapr.c | 8 ++++----
include/hw/ppc/spapr.h | 1 +
2 files changed, 5 insertions(+), 4 deletions(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index c1c0e75fcd..fc47a058dd 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -150,7 +150,7 @@ static void pre_2_10_vmstate_unregister_dummy_icp(int i)
(void *)(uintptr_t) i);
}
-static int xics_max_server_number(sPAPRMachineState *spapr)
+int spapr_max_server_number(sPAPRMachineState *spapr)
{
assert(spapr->vsmt);
return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads);
@@ -1268,7 +1268,7 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr,
_FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2));
/* /interrupt controller */
- spapr_dt_xics(xics_max_server_number(spapr), fdt, PHANDLE_XICP);
+ spapr_dt_xics(spapr_max_server_number(spapr), fdt, PHANDLE_XICP);
ret = spapr_populate_memory(spapr, fdt);
if (ret < 0) {
@@ -2467,7 +2467,7 @@ static void spapr_init_cpus(sPAPRMachineState *spapr)
if (smc->pre_2_10_has_unused_icps) {
int i;
- for (i = 0; i < xics_max_server_number(spapr); i++) {
+ for (i = 0; i < spapr_max_server_number(spapr); i++) {
/* Dummy entries get deregistered when real ICPState objects
* are registered during CPU core hotplug.
*/
@@ -2588,7 +2588,7 @@ static void spapr_machine_init(MachineState *machine)
/*
* VSMT must be set in order to be able to compute VCPU ids, ie to
- * call xics_max_server_number() or spapr_vcpu_id().
+ * call spapr_max_server_number() or spapr_vcpu_id().
*/
spapr_set_vsmt_mode(spapr, &error_fatal);
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
index 6279711fe8..198764066d 100644
--- a/include/hw/ppc/spapr.h
+++ b/include/hw/ppc/spapr.h
@@ -737,6 +737,7 @@ int spapr_hpt_shift_for_ramsize(uint64_t ramsize);
void spapr_reallocate_hpt(sPAPRMachineState *spapr, int shift,
Error **errp);
void spapr_clear_pending_events(sPAPRMachineState *spapr);
+int spapr_max_server_number(sPAPRMachineState *spapr);
/* CPU and LMB DRC release callbacks. */
void spapr_core_release(DeviceState *dev);
--
2.19.2
next prev parent reply other threads:[~2018-12-21 5:46 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-21 5:45 [Qemu-devel] [PULL 00/40] ppc-for-4.0 queue 20181221 David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 01/40] target/ppc: fix the PPC_BIT definitions David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 02/40] target/ppc: Remove silly GETFIELD/SETFIELD/MASK_TO_LSH macros David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 03/40] spapr: Fix ibm, max-associativity-domains property number of nodes David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 04/40] target/ppc: tcg: Implement addex instruction David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 05/40] spapr: drop redundant statement in spapr_populate_drconf_memory() David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 06/40] target/ppc: use g_new(T, n) instead of g_malloc(sizeof(T) * n) David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 07/40] spapr: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 08/40] ppc405_boards: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 09/40] ppc405_uc: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 10/40] ppc440_bamboo: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 11/40] sam460ex: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 12/40] virtex_ml507: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 13/40] mac_newworld: simplify IRQ wiring David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 14/40] e500: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 15/40] ppc/xive: introduce a XIVE interrupt source model David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 16/40] ppc/xive: add support for the LSI interrupt sources David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 17/40] ppc/xive: introduce the XiveNotifier interface David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 18/40] ppc/xive: introduce the XiveRouter model David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 19/40] ppc/xive: introduce the XIVE Event Notification Descriptors David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 20/40] spapr: initialize VSMT before initializing the IRQ backend David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 21/40] spapr: introduce a spapr_irq_init() routine David Gibson
2018-12-21 5:45 ` David Gibson [this message]
2018-12-21 5:45 ` [Qemu-devel] [PULL 23/40] Changes requirement for "vsubsbs" instruction David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 24/40] ppc/xive: add support for the END Event State Buffers David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 25/40] ppc/xive: introduce the XIVE interrupt thread context David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 26/40] ppc/xive: introduce a simplified XIVE presenter David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 27/40] ppc/xive: notify the CPU when the interrupt priority is more privileged David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 28/40] spapr/xive: introduce a XIVE interrupt controller David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 29/40] spapr/xive: use the VCPU id as a NVT identifier David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 30/40] spapr-iommu: Always advertise the maximum possible DMA window size David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 31/40] spapr: introduce a new machine IRQ backend for XIVE David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 32/40] spapr: add hcalls support for the XIVE exploitation interrupt mode David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 33/40] spapr: add device tree support for the XIVE exploitation mode David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 34/40] spapr: allocate the interrupt thread context under the CPU core David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 35/40] spapr: extend the sPAPR IRQ backend for XICS migration David Gibson
2019-01-03 19:07 ` Peter Maydell
2019-01-03 21:57 ` Cédric Le Goater
2019-01-04 5:16 ` David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 36/40] spapr: add a 'reset' method to the sPAPR IRQ backend David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 37/40] spapr: add an extra OV5 field " David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 38/40] spapr: introduce an 'ic-mode' machine option David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 39/40] spapr: change default CPU type to POWER9 David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 40/40] MAINTAINERS: PPC: add a XIVE section David Gibson
2018-12-21 19:30 ` [Qemu-devel] [PULL 00/40] ppc-for-4.0 queue 20181221 Peter Maydell
2019-01-03 16:39 ` Cédric Le Goater
2018-12-26 5:27 ` no-reply
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