From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, gkurz@redhat.com,
lvivier@redhat.com, clg@kaod.org,
Serhii Popovych <spopovyc@redhat.com>,
David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 03/40] spapr: Fix ibm, max-associativity-domains property number of nodes
Date: Fri, 21 Dec 2018 16:45:29 +1100 [thread overview]
Message-ID: <20181221054606.22007-4-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20181221054606.22007-1-david@gibson.dropbear.id.au>
From: Serhii Popovych <spopovyc@redhat.com>
Laurent Vivier reported off by one with maximum number of NUMA nodes
provided by qemu-kvm being less by one than required according to
description of "ibm,max-associativity-domains" property in LoPAPR.
It appears that I incorrectly treated LoPAPR description of this
property assuming it provides last valid domain (NUMA node here)
instead of maximum number of domains.
### Before hot-add
(qemu) info numa
3 nodes
node 0 cpus: 0
node 0 size: 0 MB
node 0 plugged: 0 MB
node 1 cpus:
node 1 size: 1024 MB
node 1 plugged: 0 MB
node 2 cpus:
node 2 size: 0 MB
node 2 plugged: 0 MB
$ numactl -H
available: 2 nodes (0-1)
node 0 cpus: 0
node 0 size: 0 MB
node 0 free: 0 MB
node 1 cpus:
node 1 size: 999 MB
node 1 free: 658 MB
node distances:
node 0 1
0: 10 40
1: 40 10
### Hot-add
(qemu) object_add memory-backend-ram,id=mem0,size=1G
(qemu) device_add pc-dimm,id=dimm1,memdev=mem0,node=2
(qemu) [ 87.704898] pseries-hotplug-mem: Attempting to hot-add 4 ...
<there is no "Initmem setup node 2 [mem 0xHEX-0xHEX]">
[ 87.705128] lpar: Attempting to resize HPT to shift 21
... <HPT resize messages>
### After hot-add
(qemu) info numa
3 nodes
node 0 cpus: 0
node 0 size: 0 MB
node 0 plugged: 0 MB
node 1 cpus:
node 1 size: 1024 MB
node 1 plugged: 0 MB
node 2 cpus:
node 2 size: 1024 MB
node 2 plugged: 1024 MB
$ numactl -H
available: 2 nodes (0-1)
^^^^^^^^^^^^^^^^^^^^^^^^
Still only two nodes (and memory hot-added to node 0 below)
node 0 cpus: 0
node 0 size: 1024 MB
node 0 free: 1021 MB
node 1 cpus:
node 1 size: 999 MB
node 1 free: 658 MB
node distances:
node 0 1
0: 10 40
1: 40 10
After fix applied numactl(8) reports 3 nodes available and memory
plugged into node 2 as expected.
>From David Gibson:
------------------
Qemu makes a distinction between "non NUMA" (nb_numa_nodes == 0) and
"NUMA with one node" (nb_numa_nodes == 1). But from a PAPR guests's
point of view these are equivalent. I don't want to present two
different cases to the guest when we don't need to, so even though the
guest can handle it, I'd prefer we put a '1' here for both the
nb_numa_nodes == 0 and nb_numa_nodes == 1 case.
This consolidates everything discussed previously on mailing list.
Fixes: da9f80fbad21 ("spapr: Add ibm,max-associativity-domains property")
Reported-by: Laurent Vivier <lvivier@redhat.com>
Signed-off-by: Serhii Popovych <spopovyc@redhat.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Reviewed-by: Laurent Vivier <lvivier@redhat.com>
---
hw/ppc/spapr.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 55be0f56cb..b423db311e 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -1033,7 +1033,7 @@ static void spapr_dt_rtas(sPAPRMachineState *spapr, void *fdt)
cpu_to_be32(0),
cpu_to_be32(0),
cpu_to_be32(0),
- cpu_to_be32(nb_numa_nodes ? nb_numa_nodes - 1 : 0),
+ cpu_to_be32(nb_numa_nodes ? nb_numa_nodes : 1),
};
_FDT(rtas = fdt_add_subnode(fdt, 0, "rtas"));
--
2.19.2
next prev parent reply other threads:[~2018-12-21 5:46 UTC|newest]
Thread overview: 47+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-21 5:45 [Qemu-devel] [PULL 00/40] ppc-for-4.0 queue 20181221 David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 01/40] target/ppc: fix the PPC_BIT definitions David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 02/40] target/ppc: Remove silly GETFIELD/SETFIELD/MASK_TO_LSH macros David Gibson
2018-12-21 5:45 ` David Gibson [this message]
2018-12-21 5:45 ` [Qemu-devel] [PULL 04/40] target/ppc: tcg: Implement addex instruction David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 05/40] spapr: drop redundant statement in spapr_populate_drconf_memory() David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 06/40] target/ppc: use g_new(T, n) instead of g_malloc(sizeof(T) * n) David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 07/40] spapr: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 08/40] ppc405_boards: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 09/40] ppc405_uc: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 10/40] ppc440_bamboo: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 11/40] sam460ex: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 12/40] virtex_ml507: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 13/40] mac_newworld: simplify IRQ wiring David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 14/40] e500: " David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 15/40] ppc/xive: introduce a XIVE interrupt source model David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 16/40] ppc/xive: add support for the LSI interrupt sources David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 17/40] ppc/xive: introduce the XiveNotifier interface David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 18/40] ppc/xive: introduce the XiveRouter model David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 19/40] ppc/xive: introduce the XIVE Event Notification Descriptors David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 20/40] spapr: initialize VSMT before initializing the IRQ backend David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 21/40] spapr: introduce a spapr_irq_init() routine David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 22/40] spapr: export and rename the xics_max_server_number() routine David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 23/40] Changes requirement for "vsubsbs" instruction David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 24/40] ppc/xive: add support for the END Event State Buffers David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 25/40] ppc/xive: introduce the XIVE interrupt thread context David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 26/40] ppc/xive: introduce a simplified XIVE presenter David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 27/40] ppc/xive: notify the CPU when the interrupt priority is more privileged David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 28/40] spapr/xive: introduce a XIVE interrupt controller David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 29/40] spapr/xive: use the VCPU id as a NVT identifier David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 30/40] spapr-iommu: Always advertise the maximum possible DMA window size David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 31/40] spapr: introduce a new machine IRQ backend for XIVE David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 32/40] spapr: add hcalls support for the XIVE exploitation interrupt mode David Gibson
2018-12-21 5:45 ` [Qemu-devel] [PULL 33/40] spapr: add device tree support for the XIVE exploitation mode David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 34/40] spapr: allocate the interrupt thread context under the CPU core David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 35/40] spapr: extend the sPAPR IRQ backend for XICS migration David Gibson
2019-01-03 19:07 ` Peter Maydell
2019-01-03 21:57 ` Cédric Le Goater
2019-01-04 5:16 ` David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 36/40] spapr: add a 'reset' method to the sPAPR IRQ backend David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 37/40] spapr: add an extra OV5 field " David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 38/40] spapr: introduce an 'ic-mode' machine option David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 39/40] spapr: change default CPU type to POWER9 David Gibson
2018-12-21 5:46 ` [Qemu-devel] [PULL 40/40] MAINTAINERS: PPC: add a XIVE section David Gibson
2018-12-21 19:30 ` [Qemu-devel] [PULL 00/40] ppc-for-4.0 queue 20181221 Peter Maydell
2019-01-03 16:39 ` Cédric Le Goater
2018-12-26 5:27 ` no-reply
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