From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PULL 00/42] tcg queued patches
Date: Wed, 26 Dec 2018 07:54:47 +1100 [thread overview]
Message-ID: <20181225205529.10874-1-richard.henderson@linaro.org> (raw)
The following changes since commit 9b2e891ec5ccdb4a7d583b77988848282606fdea:
Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into staging (2018-12-22 11:25:31 +0000)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tcg-20181226
for you to fetch changes up to 4250da10923347c9ee907f8d72bd93dfa5ee8742:
tcg: Improve call argument loading (2018-12-26 06:58:43 +1100)
----------------------------------------------------------------
Host support for riscv64.
Dead code elimination pass.
Register allocation improvements.
----------------------------------------------------------------
Alistair Francis (23):
elf.h: Add the RISCV ELF magic numbers
linux-user: Add host dependency for RISC-V 32-bit
linux-user: Add host dependency for RISC-V 64-bit
exec: Add RISC-V GCC poison macro
tcg/riscv: Add the tcg-target.h file
tcg/riscv: Add the tcg target registers
tcg/riscv: Add support for the constraints
tcg/riscv: Add the immediate encoders
tcg/riscv: Add the instruction emitters
tcg/riscv: Add the relocation functions
tcg/riscv: Add the mov and movi instruction
tcg/riscv: Add the extract instructions
tcg/riscv: Add the out load and store instructions
tcg/riscv: Add the add2 and sub2 instructions
tcg/riscv: Add branch and jump instructions
tcg/riscv: Add slowpath load and store instructions
tcg/riscv: Add direct load and store instructions
tcg/riscv: Add the out op decoder
tcg/riscv: Add the prologue generation and register the JIT
tcg/riscv: Add the target init code
tcg: Add RISC-V cpu signal handler
disas: Add RISC-V support
configure: Add support for building RISC-V host
Richard Henderson (19):
disas/microblaze: Remove unused REG_SP macro
linux-user: Add safe_syscall for riscv64 host
tcg: Renumber TCG_CALL_* flags
tcg: Add TCG_CALL_NO_RETURN
tcg: Reference count labels
tcg: Add reachable_code_pass
tcg: Add preferred_reg argument to tcg_reg_alloc
tcg: Add preferred_reg argument to temp_load
tcg: Add preferred_reg argument to temp_sync
tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi
tcg: Add output_pref to TCGOp
tcg: Improve register allocation for matching constraints
tcg: Dump register preference info with liveness
tcg: Reindent parts of liveness_pass_1
tcg: Rename and adjust liveness_pass_1 helpers
tcg: Split out more subroutines from liveness_pass_1
tcg: Add TCG_OPF_BB_EXIT
tcg: Record register preferences during liveness
tcg: Improve call argument loading
include/elf.h | 55 +
include/exec/helper-head.h | 13 +
include/exec/helper-tcg.h | 21 +-
include/exec/poison.h | 1 +
linux-user/host/riscv32/hostdep.h | 11 +
linux-user/host/riscv64/hostdep.h | 34 +
tcg/riscv/tcg-target.h | 177 +++
tcg/tcg-op.h | 1 +
tcg/tcg-opc.h | 7 +-
tcg/tcg.h | 31 +-
accel/tcg/user-exec.c | 75 ++
disas.c | 10 +-
disas/microblaze.c | 1 -
tcg/riscv/tcg-target.inc.c | 1949 ++++++++++++++++++++++++++++
tcg/tcg-op.c | 2 +
tcg/tcg.c | 626 +++++++--
MAINTAINERS | 12 +-
configure | 12 +-
linux-user/host/riscv64/safe-syscall.inc.S | 77 ++
19 files changed, 2948 insertions(+), 167 deletions(-)
create mode 100644 linux-user/host/riscv32/hostdep.h
create mode 100644 linux-user/host/riscv64/hostdep.h
create mode 100644 tcg/riscv/tcg-target.h
create mode 100644 tcg/riscv/tcg-target.inc.c
create mode 100644 linux-user/host/riscv64/safe-syscall.inc.S
next reply other threads:[~2018-12-25 20:55 UTC|newest]
Thread overview: 45+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-12-25 20:54 Richard Henderson [this message]
2018-12-25 20:54 ` [Qemu-devel] [PULL 01/42] elf.h: Add the RISCV ELF magic numbers Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 02/42] linux-user: Add host dependency for RISC-V 32-bit Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 03/42] linux-user: Add host dependency for RISC-V 64-bit Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 04/42] exec: Add RISC-V GCC poison macro Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 05/42] tcg/riscv: Add the tcg-target.h file Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 06/42] tcg/riscv: Add the tcg target registers Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 07/42] tcg/riscv: Add support for the constraints Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 08/42] tcg/riscv: Add the immediate encoders Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 09/42] tcg/riscv: Add the instruction emitters Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 10/42] tcg/riscv: Add the relocation functions Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 11/42] tcg/riscv: Add the mov and movi instruction Richard Henderson
2018-12-25 20:54 ` [Qemu-devel] [PULL 12/42] tcg/riscv: Add the extract instructions Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 13/42] tcg/riscv: Add the out load and store instructions Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 14/42] tcg/riscv: Add the add2 and sub2 instructions Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 15/42] tcg/riscv: Add branch and jump instructions Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 16/42] tcg/riscv: Add slowpath load and store instructions Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 17/42] tcg/riscv: Add direct " Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 18/42] tcg/riscv: Add the out op decoder Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 19/42] tcg/riscv: Add the prologue generation and register the JIT Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 20/42] tcg/riscv: Add the target init code Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 21/42] tcg: Add RISC-V cpu signal handler Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 22/42] disas: Add RISC-V support Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 23/42] configure: Add support for building RISC-V host Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 24/42] disas/microblaze: Remove unused REG_SP macro Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 25/42] linux-user: Add safe_syscall for riscv64 host Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 26/42] tcg: Renumber TCG_CALL_* flags Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 27/42] tcg: Add TCG_CALL_NO_RETURN Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 28/42] tcg: Reference count labels Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 29/42] tcg: Add reachable_code_pass Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 30/42] tcg: Add preferred_reg argument to tcg_reg_alloc Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 31/42] tcg: Add preferred_reg argument to temp_load Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 32/42] tcg: Add preferred_reg argument to temp_sync Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 33/42] tcg: Add preferred_reg argument to tcg_reg_alloc_do_movi Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 34/42] tcg: Add output_pref to TCGOp Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 35/42] tcg: Improve register allocation for matching constraints Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 36/42] tcg: Dump register preference info with liveness Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 37/42] tcg: Reindent parts of liveness_pass_1 Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 38/42] tcg: Rename and adjust liveness_pass_1 helpers Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 39/42] tcg: Split out more subroutines from liveness_pass_1 Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 40/42] tcg: Add TCG_OPF_BB_EXIT Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 41/42] tcg: Record register preferences during liveness Richard Henderson
2018-12-25 20:55 ` [Qemu-devel] [PULL 42/42] tcg: Improve call argument loading Richard Henderson
2019-01-02 22:32 ` [Qemu-devel] [PULL 00/42] tcg queued patches no-reply
2019-01-03 11:59 ` Peter Maydell
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