From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([208.118.235.92]:52036) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gez41-0003uU-SL for qemu-devel@nongnu.org; Thu, 03 Jan 2019 04:13:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gez40-0006oL-1m for qemu-devel@nongnu.org; Thu, 03 Jan 2019 04:13:17 -0500 From: Stefan Hajnoczi Date: Thu, 3 Jan 2019 09:11:17 +0000 Message-Id: <20190103091119.9367-10-stefanha@redhat.com> In-Reply-To: <20190103091119.9367-1-stefanha@redhat.com> References: <20190103091119.9367-1-stefanha@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 09/11] arm: Instantiate NRF51 Timers List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Thomas Huth , qemu-arm@nongnu.org, Joel Stanley , Julia Suvorova , Paolo Bonzini , Jim Mussared , =?UTF-8?q?Steffen=20G=C3=B6rtz?= , Peter Maydell , Laurent Vivier , Stefan Hajnoczi From: Steffen G=C3=B6rtz Instantiates TIMER0 - TIMER2 Signed-off-by: Steffen G=C3=B6rtz Reviewed-by: Stefan Hajnoczi Reviewed-by: Peter Maydell Signed-off-by: Stefan Hajnoczi --- include/hw/arm/nrf51_soc.h | 4 ++++ hw/arm/nrf51_soc.c | 26 ++++++++++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h index 84e0278881..39e613e1c9 100644 --- a/include/hw/arm/nrf51_soc.h +++ b/include/hw/arm/nrf51_soc.h @@ -15,11 +15,14 @@ #include "hw/char/nrf51_uart.h" #include "hw/misc/nrf51_rng.h" #include "hw/gpio/nrf51_gpio.h" +#include "hw/timer/nrf51_timer.h" =20 #define TYPE_NRF51_SOC "nrf51-soc" #define NRF51_SOC(obj) \ OBJECT_CHECK(NRF51State, (obj), TYPE_NRF51_SOC) =20 +#define NRF51_NUM_TIMERS 3 + typedef struct NRF51State { /*< private >*/ SysBusDevice parent_obj; @@ -30,6 +33,7 @@ typedef struct NRF51State { NRF51UARTState uart; NRF51RNGState rng; NRF51GPIOState gpio; + NRF51TimerState timer[NRF51_NUM_TIMERS]; =20 MemoryRegion iomem; MemoryRegion sram; diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c index db817fe506..ef70bd62fa 100644 --- a/hw/arm/nrf51_soc.c +++ b/hw/arm/nrf51_soc.c @@ -39,6 +39,8 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Err= or **errp) NRF51State *s =3D NRF51_SOC(dev_soc); MemoryRegion *mr; Error *err =3D NULL; + uint8_t i =3D 0; + hwaddr base_addr =3D 0; =20 if (!s->board_memory) { error_setg(errp, "memory property was not set"); @@ -112,6 +114,22 @@ static void nrf51_soc_realize(DeviceState *dev_soc, = Error **errp) /* Pass all GPIOs to the SOC layer so they are available to the boar= d */ qdev_pass_gpios(DEVICE(&s->gpio), dev_soc, NULL); =20 + /* TIMER */ + for (i =3D 0; i < NRF51_NUM_TIMERS; i++) { + object_property_set_bool(OBJECT(&s->timer[i]), true, "realized",= &err); + if (err) { + error_propagate(errp, err); + return; + } + + base_addr =3D NRF51_TIMER_BASE + i * NRF51_TIMER_SIZE; + + sysbus_mmio_map(SYS_BUS_DEVICE(&s->timer[i]), 0, base_addr); + sysbus_connect_irq(SYS_BUS_DEVICE(&s->timer[i]), 0, + qdev_get_gpio_in(DEVICE(&s->cpu), + BASE_TO_IRQ(base_addr))); + } + create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE, NRF51_IOMEM_SIZE); create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE, @@ -122,6 +140,8 @@ static void nrf51_soc_realize(DeviceState *dev_soc, E= rror **errp) =20 static void nrf51_soc_init(Object *obj) { + uint8_t i =3D 0; + NRF51State *s =3D NRF51_SOC(obj); =20 memory_region_init(&s->container, obj, "nrf51-container", UINT64_MAX= ); @@ -142,6 +162,12 @@ static void nrf51_soc_init(Object *obj) =20 sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio), TYPE_NRF51_GPIO); + + for (i =3D 0; i < NRF51_NUM_TIMERS; i++) { + sysbus_init_child_obj(obj, "timer[*]", &s->timer[i], + sizeof(s->timer[i]), TYPE_NRF51_TIMER); + + } } =20 static Property nrf51_soc_properties[] =3D { --=20 2.19.2