From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 00/10] spapr: introduce the 'dual' interrupt mode XICS/XIVE
Date: Mon, 7 Jan 2019 15:48:15 +1100 [thread overview]
Message-ID: <20190107044815.GF13339@umbus.fritz.box> (raw)
In-Reply-To: <20190102055743.5052-1-clg@kaod.org>
[-- Attachment #1: Type: text/plain, Size: 3101 bytes --]
On Wed, Jan 02, 2019 at 06:57:33AM +0100, Cédric Le Goater wrote:
> Hello,
>
> This series adds a new sPAPR IRQ backend called 'dual' which supports
> both interrupt mode, the XIVE native exploitation mode and the legacy
> compatibility mode (XICS).
>
> The machine operates with the legacy mode by default and lets CAS
> negotiate a new interrupt mode. If a new mode is selected, it is
> activated after a machine reset to take into account the required
> changes. These impact the device tree layout, the interrupt presenter
> object and the exposed MMIO regions in the case of XIVE.
>
> The preliminary changes for this new IRQ backend are the introduction
> of a second interrupt presenter object under the PowerPCCPU to support
> XIVE. The qemu_irq array of each interrupt controller model is also
> made common and moved under the machine.
Ok, I've now applied all of this series to ppc-for-4.0.
>
>
> GitHub trees available here :
>
> QEMU sPAPR:
>
> https://github.com/legoater/qemu/commits/xive-next
>
> QEMU PowerNV:
>
> https://github.com/legoater/qemu/commits/powernv-3.1
>
> Linux/KVM:
>
> https://github.com/legoater/linux/commits/xive-4.20
>
> OPAL:
>
> https://github.com/legoater/skiboot/commits/xive
>
> Best wishes for 2019 !
>
> C.
>
>
>
> Cédric Le Goater (10):
> spapr: modify the prototype of the cpu_intc_create() method
> ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU
> ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the
> CPU
> spapr/xive: simplify the sPAPR IRQ qirq method for XIVE
> ppc: export the XICS and XIVE set_irq handlers
> pnv/psi: move the ICSState qemu_irq array under the PSI device model
> spapr: move the ICSState qemu_irq array under the machine
> ppc/xics: allow ICSState to have an offset 0
> spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS
> spapr: enable XIVE MMIOs at reset
>
> include/hw/ppc/pnv.h | 2 +-
> include/hw/ppc/pnv_psi.h | 1 +
> include/hw/ppc/spapr.h | 1 +
> include/hw/ppc/spapr_irq.h | 6 +-
> include/hw/ppc/spapr_xive.h | 2 +-
> include/hw/ppc/xics.h | 6 +-
> include/hw/ppc/xive.h | 9 +-
> target/ppc/cpu.h | 5 +-
> hw/intc/spapr_xive.c | 23 ++-
> hw/intc/xics.c | 4 +-
> hw/intc/xics_kvm.c | 3 +-
> hw/intc/xics_spapr.c | 10 +-
> hw/intc/xive.c | 11 +-
> hw/ppc/pnv.c | 27 ++--
> hw/ppc/pnv_core.c | 4 +-
> hw/ppc/pnv_psi.c | 7 +-
> hw/ppc/spapr.c | 12 +-
> hw/ppc/spapr_cpu_core.c | 9 +-
> hw/ppc/spapr_hcall.c | 11 ++
> hw/ppc/spapr_irq.c | 270 ++++++++++++++++++++++++++++++++++--
> 20 files changed, 342 insertions(+), 81 deletions(-)
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2019-01-07 5:03 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-02 5:57 [Qemu-devel] [PATCH 00/10] spapr: introduce the 'dual' interrupt mode XICS/XIVE Cédric Le Goater
2019-01-02 5:57 ` [Qemu-devel] [PATCH 01/10] spapr: modify the prototype of the cpu_intc_create() method Cédric Le Goater
2019-01-02 5:57 ` [Qemu-devel] [PATCH 02/10] ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU Cédric Le Goater
2019-01-03 3:57 ` David Gibson
2019-01-03 17:44 ` Cédric Le Goater
2019-01-04 5:25 ` David Gibson
2019-01-02 5:57 ` [Qemu-devel] [PATCH 03/10] ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPU Cédric Le Goater
2019-01-02 5:57 ` [Qemu-devel] [PATCH 04/10] spapr/xive: simplify the sPAPR IRQ qirq method for XIVE Cédric Le Goater
2019-01-03 3:58 ` David Gibson
2019-01-02 5:57 ` [Qemu-devel] [PATCH 05/10] ppc: export the XICS and XIVE set_irq handlers Cédric Le Goater
2019-01-02 5:57 ` [Qemu-devel] [PATCH 06/10] pnv/psi: move the ICSState qemu_irq array under the PSI device model Cédric Le Goater
2019-01-02 5:57 ` [Qemu-devel] [PATCH 07/10] spapr: move the qemu_irq array under the machine Cédric Le Goater
2019-01-02 5:57 ` [Qemu-devel] [PATCH 08/10] ppc/xics: allow ICSState to have an offset 0 Cédric Le Goater
2019-01-03 4:33 ` David Gibson
2019-01-03 17:45 ` Cédric Le Goater
2019-01-07 4:29 ` David Gibson
2019-01-02 5:57 ` [Qemu-devel] [PATCH 09/10] spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS Cédric Le Goater
2019-01-03 4:35 ` David Gibson
2019-01-03 17:45 ` Cédric Le Goater
2019-01-02 5:57 ` [Qemu-devel] [PATCH 10/10] spapr: enable XIVE MMIOs at reset Cédric Le Goater
2019-01-07 4:48 ` David Gibson [this message]
2019-01-07 6:54 ` [Qemu-devel] [PATCH 00/10] spapr: introduce the 'dual' interrupt mode XICS/XIVE Cédric Le Goater
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190107044815.GF13339@umbus.fritz.box \
--to=david@gibson.dropbear.id.au \
--cc=clg@kaod.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).