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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH v3 13/31] target/arm: Decode PAuth within disas_uncond_b_reg
Date: Wed,  9 Jan 2019 08:31:11 +1000	[thread overview]
Message-ID: <20190108223129.5570-14-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190108223129.5570-1-richard.henderson@linaro.org>

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.c | 82 +++++++++++++++++++++++++++++++++++++-
 1 file changed, 81 insertions(+), 1 deletion(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e601753032..fa50003f0b 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -1982,6 +1982,7 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
 {
     unsigned int opc, op2, op3, rn, op4;
     TCGv_i64 dst;
+    TCGv_i64 modifier;
 
     opc = extract32(insn, 21, 4);
     op2 = extract32(insn, 16, 5);
@@ -1999,12 +2000,44 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
     case 2: /* RET */
         switch (op3) {
         case 0:
+            /* BR, BLR, RET */
             if (op4 != 0) {
                 goto do_unallocated;
             }
             dst = cpu_reg(s, rn);
             break;
 
+        case 2:
+        case 3:
+            if (!dc_isar_feature(aa64_pauth, s)) {
+                goto do_unallocated;
+            }
+            if (opc == 2) {
+                /* RETAA, RETAB */
+                if (rn != 0x1f || op4 != 0x1f) {
+                    goto do_unallocated;
+                }
+                rn = 30;
+                modifier = cpu_X[31];
+            } else {
+                /* BRAAZ, BRABZ, BLRAAZ, BLRABZ */
+                if (op4 != 0x1f) {
+                    goto do_unallocated;
+                }
+                modifier = new_tmp_a64_zero(s);
+            }
+            if (s->pauth_active) {
+                dst = new_tmp_a64(s);
+                if (op3 == 2) {
+                    gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier);
+                } else {
+                    gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier);
+                }
+            } else {
+                dst = cpu_reg(s, rn);
+            }
+            break;
+
         default:
             goto do_unallocated;
         }
@@ -2016,12 +2049,38 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
         }
         break;
 
+    case 8: /* BRAA */
+    case 9: /* BLRAA */
+        if (!dc_isar_feature(aa64_pauth, s)) {
+            goto do_unallocated;
+        }
+        if (op3 != 2 || op3 != 3) {
+            goto do_unallocated;
+        }
+        if (s->pauth_active) {
+            dst = new_tmp_a64(s);
+            modifier = cpu_reg_sp(s, op4);
+            if (op3 == 2) {
+                gen_helper_autia(dst, cpu_env, cpu_reg(s, rn), modifier);
+            } else {
+                gen_helper_autib(dst, cpu_env, cpu_reg(s, rn), modifier);
+            }
+        } else {
+            dst = cpu_reg(s, rn);
+        }
+        gen_a64_set_pc(s, dst);
+        /* BLRAA also needs to load return address */
+        if (opc == 9) {
+            tcg_gen_movi_i64(cpu_reg(s, 30), s->pc);
+        }
+        break;
+
     case 4: /* ERET */
         if (s->current_el == 0) {
             goto do_unallocated;
         }
         switch (op3) {
-        case 0:
+        case 0: /* ERET */
             if (op4 != 0) {
                 goto do_unallocated;
             }
@@ -2030,6 +2089,27 @@ static void disas_uncond_b_reg(DisasContext *s, uint32_t insn)
                            offsetof(CPUARMState, elr_el[s->current_el]));
             break;
 
+        case 2: /* ERETAA */
+        case 3: /* ERETAB */
+            if (!dc_isar_feature(aa64_pauth, s)) {
+                goto do_unallocated;
+            }
+            if (rn != 0x1f || op4 != 0x1f) {
+                goto do_unallocated;
+            }
+            dst = tcg_temp_new_i64();
+            tcg_gen_ld_i64(dst, cpu_env,
+                           offsetof(CPUARMState, elr_el[s->current_el]));
+            if (s->pauth_active) {
+                modifier = cpu_X[31];
+                if (op3 == 2) {
+                    gen_helper_autia(dst, cpu_env, dst, modifier);
+                } else {
+                    gen_helper_autib(dst, cpu_env, dst, modifier);
+                }
+            }
+            break;
+
         default:
             goto do_unallocated;
         }
-- 
2.17.2

  parent reply	other threads:[~2019-01-08 22:32 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-08 22:30 [Qemu-devel] [PATCH v3 00/31] target/arm: Implement ARMv8.3-PAuth Richard Henderson
2019-01-08 22:30 ` [Qemu-devel] [PATCH v3 01/31] target/arm: Add state for the ARMv8.3-PAuth extension Richard Henderson
2019-01-18 13:34   ` Peter Maydell
2019-01-21 10:10   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 02/31] target/arm: Add SCTLR bits through ARMv8.5 Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 03/31] target/arm: Add PAuth active bit to tbflags Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 04/31] target/arm: Introduce raise_exception_ra Richard Henderson
2019-01-08 23:26   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 05/31] target/arm: Add PAuth helpers Richard Henderson
2019-01-08 23:28   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 06/31] target/arm: Decode PAuth within system hint space Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 07/31] target/arm: Rearrange decode in disas_data_proc_1src Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 08/31] target/arm: Decode PAuth within disas_data_proc_1src Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 09/31] target/arm: Decode PAuth within disas_data_proc_2src Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 10/31] target/arm: Move helper_exception_return to helper-a64.c Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 11/31] target/arm: Add new_pc argument to helper_exception_return Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 12/31] target/arm: Rearrange decode in disas_uncond_b_reg Richard Henderson
2019-01-18 11:40   ` Peter Maydell
2019-01-08 22:31 ` Richard Henderson [this message]
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 14/31] target/arm: Decode Load/store register (pac) Richard Henderson
2019-01-08 23:34   ` Peter Maydell
2019-01-09 11:01     ` Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 15/31] target/arm: Move cpu_mmu_index out of line Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 16/31] target/arm: Introduce arm_mmu_idx Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 17/31] target/arm: Introduce arm_stage1_mmu_idx Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 18/31] target/arm: Create ARMVAParameters and helpers Richard Henderson
2019-01-18 11:42   ` Peter Maydell
2019-01-24 11:54   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 19/31] target/arm: Merge TBFLAG_AA_TB{0, 1} to TBII Richard Henderson
2019-01-18 11:44   ` Peter Maydell
2019-01-18 11:45   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 20/31] target/arm: Export aa64_va_parameters to internals.h Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 21/31] target/arm: Add aa64_va_parameters_both Richard Henderson
2019-01-18 12:00   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 22/31] target/arm: Decode TBID from TCR Richard Henderson
2019-01-18 12:05   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 23/31] target/arm: Reuse aa64_va_parameters for setting tbflags Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 24/31] target/arm: Implement pauth_strip Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 25/31] target/arm: Implement pauth_auth Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 26/31] target/arm: Implement pauth_addpac Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 27/31] target/arm: Implement pauth_computepac Richard Henderson
2019-01-18 12:09   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 28/31] target/arm: Add PAuth system registers Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 29/31] target/arm: Enable PAuth for -cpu max Richard Henderson
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 30/31] target/arm: Enable PAuth for user-only Richard Henderson
2019-01-18 12:11   ` Peter Maydell
2019-01-08 22:31 ` [Qemu-devel] [PATCH v3 31/31] target/arm: Tidy TBI handling in gen_a64_set_pc Richard Henderson
2019-01-09  4:59 ` [Qemu-devel] [PATCH v3 00/31] target/arm: Implement ARMv8.3-PAuth no-reply
2019-01-18 13:38 ` Peter Maydell

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