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From: David Gibson <david@gibson.dropbear.id.au>
To: peter.maydell@linaro.org
Cc: groug@kaod.org, clg@kaod.org, qemu-devel@nongnu.org,
	qemu-ppc@nongnu.org,
	Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
	Richard Henderson <richard.henderson@linaro.org>,
	David Gibson <david@gibson.dropbear.id.au>
Subject: [Qemu-devel] [PULL 11/29] target/ppc: merge ppc_vsr_t and ppc_avr_t union types
Date: Wed,  9 Jan 2019 09:45:42 +1100	[thread overview]
Message-ID: <20190108224600.23125-12-david@gibson.dropbear.id.au> (raw)
In-Reply-To: <20190108224600.23125-1-david@gibson.dropbear.id.au>

From: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>

Since the VSX registers are actually a superset of the VMX registers then they
can be represented by the same type. Merge ppc_avr_t into ppc_vsr_t and change
ppc_avr_t to be a simple typedef alias.

Note that due to a difference in the naming of the float32 member between
ppc_avr_t and ppc_vsr_t, references to the ppc_avr_t f member must be replaced
with f32 instead.

Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Acked-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target/ppc/cpu.h        | 17 +++++++------
 target/ppc/int_helper.c | 56 +++++++++++++++++++++--------------------
 target/ppc/internal.h   | 11 --------
 3 files changed, 39 insertions(+), 45 deletions(-)

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index d5f99f1fc7..578641ac20 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -218,7 +218,6 @@ typedef struct opc_handler_t opc_handler_t;
 /* Types used to describe some PowerPC registers etc. */
 typedef struct DisasContext DisasContext;
 typedef struct ppc_spr_t ppc_spr_t;
-typedef union ppc_avr_t ppc_avr_t;
 typedef union ppc_tlb_t ppc_tlb_t;
 typedef struct ppc_hash_pte64 ppc_hash_pte64_t;
 
@@ -242,22 +241,26 @@ struct ppc_spr_t {
 #endif
 };
 
-/* Altivec registers (128 bits) */
-union ppc_avr_t {
-    float32 f[4];
+/* VSX/Altivec registers (128 bits) */
+typedef union _ppc_vsr_t {
     uint8_t u8[16];
     uint16_t u16[8];
     uint32_t u32[4];
+    uint64_t u64[2];
     int8_t s8[16];
     int16_t s16[8];
     int32_t s32[4];
-    uint64_t u64[2];
     int64_t s64[2];
+    float32 f32[4];
+    float64 f64[2];
+    float128 f128;
 #ifdef CONFIG_INT128
     __uint128_t u128;
 #endif
-    Int128 s128;
-};
+    Int128  s128;
+} ppc_vsr_t;
+
+typedef ppc_vsr_t ppc_avr_t;
 
 #if !defined(CONFIG_USER_ONLY)
 /* Software TLB cache */
diff --git a/target/ppc/int_helper.c b/target/ppc/int_helper.c
index fcac90a4a9..9d715be25c 100644
--- a/target/ppc/int_helper.c
+++ b/target/ppc/int_helper.c
@@ -548,8 +548,8 @@ VARITH_DO(muluwm, *, u32)
     {                                                                   \
         int i;                                                          \
                                                                         \
-        for (i = 0; i < ARRAY_SIZE(r->f); i++) {                        \
-            r->f[i] = func(a->f[i], b->f[i], &env->vec_status);         \
+        for (i = 0; i < ARRAY_SIZE(r->f32); i++) {                      \
+            r->f32[i] = func(a->f32[i], b->f32[i], &env->vec_status);   \
         }                                                               \
     }
 VARITHFP(addfp, float32_add)
@@ -563,9 +563,9 @@ VARITHFP(maxfp, float32_max)
                            ppc_avr_t *b, ppc_avr_t *c)                  \
     {                                                                   \
         int i;                                                          \
-        for (i = 0; i < ARRAY_SIZE(r->f); i++) {                        \
-            r->f[i] = float32_muladd(a->f[i], c->f[i], b->f[i],         \
-                                     type, &env->vec_status);           \
+        for (i = 0; i < ARRAY_SIZE(r->f32); i++) {                      \
+            r->f32[i] = float32_muladd(a->f32[i], c->f32[i], b->f32[i], \
+                                       type, &env->vec_status);         \
         }                                                               \
     }
 VARITHFPFMA(maddfp, 0);
@@ -670,9 +670,9 @@ VABSDU(w, u32)
     {                                                                   \
         int i;                                                          \
                                                                         \
-        for (i = 0; i < ARRAY_SIZE(r->f); i++) {                        \
+        for (i = 0; i < ARRAY_SIZE(r->f32); i++) {                      \
             float32 t = cvt(b->element[i], &env->vec_status);           \
-            r->f[i] = float32_scalbn(t, -uim, &env->vec_status);        \
+            r->f32[i] = float32_scalbn(t, -uim, &env->vec_status);      \
         }                                                               \
     }
 VCF(ux, uint32_to_float32, u32)
@@ -782,9 +782,9 @@ VCMPNE(w, u32, uint32_t, 0)
         uint32_t none = 0;                                              \
         int i;                                                          \
                                                                         \
-        for (i = 0; i < ARRAY_SIZE(r->f); i++) {                        \
+        for (i = 0; i < ARRAY_SIZE(r->f32); i++) {                      \
             uint32_t result;                                            \
-            int rel = float32_compare_quiet(a->f[i], b->f[i],           \
+            int rel = float32_compare_quiet(a->f32[i], b->f32[i],       \
                                             &env->vec_status);          \
             if (rel == float_relation_unordered) {                      \
                 result = 0;                                             \
@@ -816,14 +816,16 @@ static inline void vcmpbfp_internal(CPUPPCState *env, ppc_avr_t *r,
     int i;
     int all_in = 0;
 
-    for (i = 0; i < ARRAY_SIZE(r->f); i++) {
-        int le_rel = float32_compare_quiet(a->f[i], b->f[i], &env->vec_status);
+    for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
+        int le_rel = float32_compare_quiet(a->f32[i], b->f32[i],
+                                           &env->vec_status);
         if (le_rel == float_relation_unordered) {
             r->u32[i] = 0xc0000000;
             all_in = 1;
         } else {
-            float32 bneg = float32_chs(b->f[i]);
-            int ge_rel = float32_compare_quiet(a->f[i], bneg, &env->vec_status);
+            float32 bneg = float32_chs(b->f32[i]);
+            int ge_rel = float32_compare_quiet(a->f32[i], bneg,
+                                               &env->vec_status);
             int le = le_rel != float_relation_greater;
             int ge = ge_rel != float_relation_less;
 
@@ -856,11 +858,11 @@ void helper_vcmpbfp_dot(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *a,
         float_status s = env->vec_status;                               \
                                                                         \
         set_float_rounding_mode(float_round_to_zero, &s);               \
-        for (i = 0; i < ARRAY_SIZE(r->f); i++) {                        \
-            if (float32_is_any_nan(b->f[i])) {                          \
+        for (i = 0; i < ARRAY_SIZE(r->f32); i++) {                      \
+            if (float32_is_any_nan(b->f32[i])) {                        \
                 r->element[i] = 0;                                      \
             } else {                                                    \
-                float64 t = float32_to_float64(b->f[i], &s);            \
+                float64 t = float32_to_float64(b->f32[i], &s);          \
                 int64_t j;                                              \
                                                                         \
                 t = float64_scalbn(t, uim, &s);                         \
@@ -1661,8 +1663,8 @@ void helper_vrefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
 {
     int i;
 
-    for (i = 0; i < ARRAY_SIZE(r->f); i++) {
-        r->f[i] = float32_div(float32_one, b->f[i], &env->vec_status);
+    for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
+        r->f32[i] = float32_div(float32_one, b->f32[i], &env->vec_status);
     }
 }
 
@@ -1674,8 +1676,8 @@ void helper_vrefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
         float_status s = env->vec_status;                       \
                                                                 \
         set_float_rounding_mode(rounding, &s);                  \
-        for (i = 0; i < ARRAY_SIZE(r->f); i++) {                \
-            r->f[i] = float32_round_to_int (b->f[i], &s);       \
+        for (i = 0; i < ARRAY_SIZE(r->f32); i++) {              \
+            r->f32[i] = float32_round_to_int (b->f32[i], &s);   \
         }                                                       \
     }
 VRFI(n, float_round_nearest_even)
@@ -1705,10 +1707,10 @@ void helper_vrsqrtefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
 {
     int i;
 
-    for (i = 0; i < ARRAY_SIZE(r->f); i++) {
-        float32 t = float32_sqrt(b->f[i], &env->vec_status);
+    for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
+        float32 t = float32_sqrt(b->f32[i], &env->vec_status);
 
-        r->f[i] = float32_div(float32_one, t, &env->vec_status);
+        r->f32[i] = float32_div(float32_one, t, &env->vec_status);
     }
 }
 
@@ -1751,8 +1753,8 @@ void helper_vexptefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
 {
     int i;
 
-    for (i = 0; i < ARRAY_SIZE(r->f); i++) {
-        r->f[i] = float32_exp2(b->f[i], &env->vec_status);
+    for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
+        r->f32[i] = float32_exp2(b->f32[i], &env->vec_status);
     }
 }
 
@@ -1760,8 +1762,8 @@ void helper_vlogefp(CPUPPCState *env, ppc_avr_t *r, ppc_avr_t *b)
 {
     int i;
 
-    for (i = 0; i < ARRAY_SIZE(r->f); i++) {
-        r->f[i] = float32_log2(b->f[i], &env->vec_status);
+    for (i = 0; i < ARRAY_SIZE(r->f32); i++) {
+        r->f32[i] = float32_log2(b->f32[i], &env->vec_status);
     }
 }
 
diff --git a/target/ppc/internal.h b/target/ppc/internal.h
index 5d460247e2..bd247f2504 100644
--- a/target/ppc/internal.h
+++ b/target/ppc/internal.h
@@ -204,17 +204,6 @@ EXTRACT_HELPER(IMM8, 11, 8);
 EXTRACT_HELPER(DCMX, 16, 7);
 EXTRACT_HELPER_SPLIT_3(DCMX_XV, 5, 16, 0, 1, 2, 5, 1, 6, 6);
 
-typedef union _ppc_vsr_t {
-    uint8_t u8[16];
-    uint16_t u16[8];
-    uint32_t u32[4];
-    uint64_t u64[2];
-    float32 f32[4];
-    float64 f64[2];
-    float128 f128;
-    Int128  s128;
-} ppc_vsr_t;
-
 #if defined(HOST_WORDS_BIGENDIAN)
 #define VsrB(i) u8[i]
 #define VsrH(i) u16[i]
-- 
2.20.1

  parent reply	other threads:[~2019-01-08 22:46 UTC|newest]

Thread overview: 39+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-08 22:45 [Qemu-devel] [PULL 00/29] ppc-for-4.0 queue 20190109 David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 01/29] spapr: Add H-Call H_HOME_NODE_ASSOCIATIVITY David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 02/29] ppc/spapr: Receive and store device tree blob from SLOF David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 03/29] ppc4xx: Disable debug logging by default David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 04/29] MAINTAINERS: Add more files to sam460ex David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 05/29] target/ppc: fix typo in SIMM5 extraction helper David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 06/29] target/ppc: switch EXTRACT_HELPER macros over to use sextract32/extract32 David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 07/29] target/ppc: introduce get_fpr() and set_fpr() helpers for FP register access David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 08/29] target/ppc: introduce get_avr64() and set_avr64() helpers for VMX " David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 09/29] target/ppc: introduce get_cpu_vsr{l, h}() and set_cpu_vsr{l, h}() helpers for VSR " David Gibson
2019-06-04 21:23   ` [Qemu-devel] [Qemu-ppc] " Laurent Vivier
2019-06-05  6:32     ` Mark Cave-Ayland
2019-06-05  7:43       ` Laurent Vivier
2019-06-05  7:47         ` Mark Cave-Ayland
2019-06-06 19:24         ` Laurent Vivier
2019-06-06 20:21           ` Mark Cave-Ayland
2019-06-07  9:19             ` Laurent Vivier
2019-01-08 22:45 ` [Qemu-devel] [PULL 10/29] target/ppc: switch FPR, VMX and VSX helpers to access data directly from cpu_env David Gibson
2019-01-08 22:45 ` David Gibson [this message]
2019-01-08 22:45 ` [Qemu-devel] [PULL 12/29] target/ppc: move FP and VMX registers into aligned vsr register array David Gibson
2020-01-24 13:21   ` Peter Maydell
2019-01-08 22:45 ` [Qemu-devel] [PULL 13/29] target/ppc: replace AVR* macros with Vsr* macros David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 14/29] MAINTAINERS: Add some missing ppc-related files David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 15/29] MAINTAINERS: add qemu_vga.ndrv file entry for Mac machines David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 16/29] spapr: move spapr_create_phb() to core machine code David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 17/29] pci: allow cleanup/unregistration of PCI root buses David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 18/29] spapr_pci: Define SPAPR_MAX_PHBS in hw/pci-host/spapr.h David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 19/29] spapr/xive: simplify the sPAPR IRQ qirq method for XIVE David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 20/29] spapr: modify the prototype of the cpu_intc_create() method David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 21/29] ppc/xive: introduce a XiveTCTX pointer under PowerPCCPU David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 22/29] ppc: replace the 'Object *intc' by a 'ICPState *icp' pointer under the CPU David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 23/29] spapr: return from post_load method when RTC import fails David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 24/29] ppc: export the XICS and XIVE set_irq handlers David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 25/29] pnv/psi: move the ICSState qemu_irq array under the PSI device model David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 26/29] spapr: move the qemu_irq array under the machine David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 27/29] ppc/xics: allow ICSState to have an offset 0 David Gibson
2019-01-08 22:45 ` [Qemu-devel] [PULL 28/29] spapr: introduce a new sPAPR IRQ backend supporting XIVE and XICS David Gibson
2019-01-08 22:46 ` [Qemu-devel] [PULL 29/29] spapr: enable XIVE MMIOs at reset David Gibson
2019-01-09 23:33 ` [Qemu-devel] [PULL 00/29] ppc-for-4.0 queue 20190109 Peter Maydell

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