From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH 04/11] target/arm: Record the GP bit for a page in MemTxAttrs
Date: Thu, 10 Jan 2019 23:17:29 +1100 [thread overview]
Message-ID: <20190110121736.23448-5-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190110121736.23448-1-richard.henderson@linaro.org>
This isn't really a transaction attribute, but that's the most
convenient place to hold a random bit of information within the
softmmu tlb.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
include/exec/memattrs.h | 2 ++
target/arm/helper.c | 6 ++++++
2 files changed, 8 insertions(+)
diff --git a/include/exec/memattrs.h b/include/exec/memattrs.h
index d4a1642098..39d61188e1 100644
--- a/include/exec/memattrs.h
+++ b/include/exec/memattrs.h
@@ -35,6 +35,8 @@ typedef struct MemTxAttrs {
unsigned int secure:1;
/* Memory access is usermode (unprivileged) */
unsigned int user:1;
+ /* Page is marked as "guarded" */
+ unsigned int guarded:1;
/* Requester ID (for MSI for example) */
unsigned int requester_id:16;
} MemTxAttrs;
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 138d9d5565..4e9ea2ed39 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -9927,6 +9927,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
bool ttbr1_valid;
uint64_t descaddrmask;
bool aarch64 = arm_el_is_aa64(env, el);
+ bool guarded = false;
/* TODO:
* This code does not handle the different format TCR for VTCR_EL2.
@@ -10098,6 +10099,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
}
/* Merge in attributes from table descriptors */
attrs |= nstable << 3; /* NS */
+ guarded |= extract64(descriptor, 50, 1); /* GP */
if (param.hpd) {
/* HPD disables all the table attributes except NSTable. */
break;
@@ -10143,6 +10145,10 @@ static bool get_phys_addr_lpae(CPUARMState *env, target_ulong address,
*/
txattrs->secure = false;
}
+ /* When in aarch64 mode, and BTI is enabled, remember GP in the IOTLB. */
+ if (aarch64 && guarded && cpu_isar_feature(aa64_bti, cpu)) {
+ txattrs->guarded = true;
+ }
if (cacheattrs != NULL) {
if (mmu_idx == ARMMMUIdx_S2NS) {
--
2.17.2
next prev parent reply other threads:[~2019-01-10 12:17 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-10 12:17 [Qemu-devel] [PATCH 00/11] target/arm: Implement ARMv8.5-BTI Richard Henderson
2019-01-10 12:17 ` [Qemu-devel] [PATCH 01/11] target/arm: Introduce isar_feature_aa64_bti Richard Henderson
2019-01-22 12:01 ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 02/11] target/arm: Add PSTATE.BTYPE Richard Henderson
2019-01-22 12:08 ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 03/11] target/arm: Add BT and BTYPE to tb->flags Richard Henderson
2019-01-22 12:57 ` Peter Maydell
2019-01-10 12:17 ` Richard Henderson [this message]
2019-01-22 13:26 ` [Qemu-devel] [PATCH 04/11] target/arm: Record the GP bit for a page in MemTxAttrs Peter Maydell
2019-01-28 21:08 ` Richard Henderson
2019-01-29 9:55 ` Peter Maydell
2019-01-29 14:38 ` Richard Henderson
2019-01-10 12:17 ` [Qemu-devel] [PATCH 05/11] target/arm: Default handling of BTYPE during translation Richard Henderson
2019-01-22 13:50 ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 06/11] target/arm: Reset btype for direct branches and syscalls Richard Henderson
2019-01-22 14:12 ` Peter Maydell
2019-01-28 21:28 ` Richard Henderson
2019-01-29 9:57 ` Peter Maydell
2019-01-29 14:05 ` Richard Henderson
2019-01-29 14:06 ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 07/11] target/arm: Set btype for indirect branches Richard Henderson
2019-01-22 15:28 ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 08/11] target/arm: Add guarded_pages cpu property for user-only Richard Henderson
2019-01-22 15:29 ` Peter Maydell
2019-01-22 15:42 ` Richard Henderson
2019-01-22 16:57 ` Peter Maydell
2019-01-28 22:01 ` Richard Henderson
2019-01-10 12:17 ` [Qemu-devel] [PATCH 09/11] target/arm: Enable BTI for -cpu max Richard Henderson
2019-01-22 15:30 ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 10/11] linux-user/aarch64: Reset btype for signal handlers Richard Henderson
2019-01-22 15:46 ` Peter Maydell
2019-01-10 12:17 ` [Qemu-devel] [PATCH 11/11] tests/tcg/aarch64: Add bti smoke test Richard Henderson
2019-01-31 18:05 ` [Qemu-devel] [PATCH 00/11] target/arm: Implement ARMv8.5-BTI no-reply
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