From: Max Filippov <jcmvbkbc@gmail.com>
To: qemu-devel@nongnu.org
Cc: Max Filippov <jcmvbkbc@gmail.com>
Subject: [Qemu-devel] [PATCH 7/7] target/xtensa: move non-HELPER functions to helper.c
Date: Sun, 13 Jan 2019 23:48:55 -0800 [thread overview]
Message-ID: <20190114074855.16891-8-jcmvbkbc@gmail.com> (raw)
In-Reply-To: <20190114074855.16891-1-jcmvbkbc@gmail.com>
Move remaining non-HELPER functions from op_helper.c to helper.c.
No functional changes.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
target/xtensa/helper.c | 61 ++++++++++++++++++++++++++++++++++++++++++++---
target/xtensa/op_helper.c | 56 -------------------------------------------
2 files changed, 58 insertions(+), 59 deletions(-)
diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c
index 2f1dec5c63e9..323c47a7fb54 100644
--- a/target/xtensa/helper.c
+++ b/target/xtensa/helper.c
@@ -29,10 +29,8 @@
#include "cpu.h"
#include "exec/exec-all.h"
#include "exec/gdbstub.h"
+#include "exec/helper-proto.h"
#include "qemu/host-utils.h"
-#if !defined(CONFIG_USER_ONLY)
-#include "hw/loader.h"
-#endif
static struct XtensaConfigList *xtensa_cores;
@@ -188,6 +186,63 @@ int xtensa_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int size, int rw,
#else
+void xtensa_cpu_do_unaligned_access(CPUState *cs,
+ vaddr addr, MMUAccessType access_type,
+ int mmu_idx, uintptr_t retaddr)
+{
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ CPUXtensaState *env = &cpu->env;
+
+ if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
+ !xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
+ cpu_restore_state(CPU(cpu), retaddr, true);
+ HELPER(exception_cause_vaddr)(env,
+ env->pc, LOAD_STORE_ALIGNMENT_CAUSE,
+ addr);
+ }
+}
+
+void tlb_fill(CPUState *cs, target_ulong vaddr, int size,
+ MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
+{
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ CPUXtensaState *env = &cpu->env;
+ uint32_t paddr;
+ uint32_t page_size;
+ unsigned access;
+ int ret = xtensa_get_physical_addr(env, true, vaddr, access_type, mmu_idx,
+ &paddr, &page_size, &access);
+
+ qemu_log_mask(CPU_LOG_MMU, "%s(%08x, %d, %d) -> %08x, ret = %d\n",
+ __func__, vaddr, access_type, mmu_idx, paddr, ret);
+
+ if (ret == 0) {
+ tlb_set_page(cs,
+ vaddr & TARGET_PAGE_MASK,
+ paddr & TARGET_PAGE_MASK,
+ access, mmu_idx, page_size);
+ } else {
+ cpu_restore_state(cs, retaddr, true);
+ HELPER(exception_cause_vaddr)(env, env->pc, ret, vaddr);
+ }
+}
+
+void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
+ unsigned size, MMUAccessType access_type,
+ int mmu_idx, MemTxAttrs attrs,
+ MemTxResult response, uintptr_t retaddr)
+{
+ XtensaCPU *cpu = XTENSA_CPU(cs);
+ CPUXtensaState *env = &cpu->env;
+
+ cpu_restore_state(cs, retaddr, true);
+ HELPER(exception_cause_vaddr)(env, env->pc,
+ access_type == MMU_INST_FETCH ?
+ INSTR_PIF_ADDR_ERROR_CAUSE :
+ LOAD_STORE_PIF_ADDR_ERROR_CAUSE,
+ addr);
+}
+
void xtensa_runstall(CPUXtensaState *env, bool runstall)
{
CPUState *cpu = CPU(xtensa_env_get_cpu(env));
diff --git a/target/xtensa/op_helper.c b/target/xtensa/op_helper.c
index b0ef828f9ae5..1865f46c4b5f 100644
--- a/target/xtensa/op_helper.c
+++ b/target/xtensa/op_helper.c
@@ -37,62 +37,6 @@
#ifndef CONFIG_USER_ONLY
-void xtensa_cpu_do_unaligned_access(CPUState *cs,
- vaddr addr, MMUAccessType access_type,
- int mmu_idx, uintptr_t retaddr)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
-
- if (xtensa_option_enabled(env->config, XTENSA_OPTION_UNALIGNED_EXCEPTION) &&
- !xtensa_option_enabled(env->config, XTENSA_OPTION_HW_ALIGNMENT)) {
- cpu_restore_state(CPU(cpu), retaddr, true);
- HELPER(exception_cause_vaddr)(env,
- env->pc, LOAD_STORE_ALIGNMENT_CAUSE, addr);
- }
-}
-
-void tlb_fill(CPUState *cs, target_ulong vaddr, int size,
- MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
- uint32_t paddr;
- uint32_t page_size;
- unsigned access;
- int ret = xtensa_get_physical_addr(env, true, vaddr, access_type, mmu_idx,
- &paddr, &page_size, &access);
-
- qemu_log_mask(CPU_LOG_MMU, "%s(%08x, %d, %d) -> %08x, ret = %d\n",
- __func__, vaddr, access_type, mmu_idx, paddr, ret);
-
- if (ret == 0) {
- tlb_set_page(cs,
- vaddr & TARGET_PAGE_MASK,
- paddr & TARGET_PAGE_MASK,
- access, mmu_idx, page_size);
- } else {
- cpu_restore_state(cs, retaddr, true);
- HELPER(exception_cause_vaddr)(env, env->pc, ret, vaddr);
- }
-}
-
-void xtensa_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
- unsigned size, MMUAccessType access_type,
- int mmu_idx, MemTxAttrs attrs,
- MemTxResult response, uintptr_t retaddr)
-{
- XtensaCPU *cpu = XTENSA_CPU(cs);
- CPUXtensaState *env = &cpu->env;
-
- cpu_restore_state(cs, retaddr, true);
- HELPER(exception_cause_vaddr)(env, env->pc,
- access_type == MMU_INST_FETCH ?
- INSTR_PIF_ADDR_ERROR_CAUSE :
- LOAD_STORE_PIF_ADDR_ERROR_CAUSE,
- addr);
-}
-
void HELPER(update_ccount)(CPUXtensaState *env)
{
uint64_t now = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
--
2.11.0
next prev parent reply other threads:[~2019-01-14 7:49 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-14 7:48 [Qemu-devel] [PATCH 0/7] target/xtensa: group helpers by functionality Max Filippov
2019-01-14 7:48 ` [Qemu-devel] [PATCH 1/7] target/xtensa: extract FPU helpers Max Filippov
2019-01-14 7:48 ` [Qemu-devel] [PATCH 2/7] target/xtensa: extract windowed registers helpers Max Filippov
2019-01-14 7:48 ` [Qemu-devel] [PATCH 3/7] target/xtensa: extract MMU helpers Max Filippov
2019-01-14 7:48 ` [Qemu-devel] [PATCH 4/7] target/xtensa: extract debug helpers Max Filippov
2019-01-14 7:48 ` [Qemu-devel] [PATCH 5/7] target/xtensa: extract interrupt and exception helpers Max Filippov
2019-01-14 7:48 ` [Qemu-devel] [PATCH 6/7] target/xtensa: drop dump_state helper Max Filippov
2019-01-14 7:48 ` Max Filippov [this message]
2021-05-17 5:05 ` [Qemu-devel] [PATCH 7/7] target/xtensa: move non-HELPER functions to helper.c Philippe Mathieu-Daudé
2021-05-17 11:50 ` Max Filippov
2021-05-17 12:11 ` Max Filippov
2021-05-17 13:10 ` Philippe Mathieu-Daudé
2021-05-17 13:41 ` Philippe Mathieu-Daudé
2021-05-17 15:25 ` Max Filippov
2021-05-17 15:35 ` Max Filippov
2021-05-17 16:54 ` Philippe Mathieu-Daudé
2021-05-17 16:57 ` Max Filippov
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