From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:35241) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gjUyU-0007ab-4H for qemu-devel@nongnu.org; Tue, 15 Jan 2019 15:06:18 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gjUyP-0003Mg-4y for qemu-devel@nongnu.org; Tue, 15 Jan 2019 15:06:13 -0500 Received: from mx1.redhat.com ([209.132.183.28]:1371) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gjUyN-000397-UQ for qemu-devel@nongnu.org; Tue, 15 Jan 2019 15:06:08 -0500 Date: Tue, 15 Jan 2019 15:05:55 -0500 From: "Michael S. Tsirkin" Message-ID: <20190115200252.25911-38-mst@redhat.com> References: <20190115200252.25911-1-mst@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20190115200252.25911-1-mst@redhat.com> Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PULL v2 37/49] tpm: add a "ppi" boolean property List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: Peter Maydell , =?utf-8?Q?Marc-Andr=C3=A9?= Lureau , Igor Mammedov , Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= , Stefan Berger , Eduardo Habkost , Marcel Apfelbaum From: Marc-Andr=C3=A9 Lureau The following patches implement the TPM Physical Presence Interface, make use of a new memory region and a fw_cfg entry. Enable PPI by default with >=3D4.0 machine type, to avoid migration issues. Signed-off-by: Marc-Andr=C3=A9 Lureau Reviewed-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Michael S. Tsirkin Tested-by: Stefan Berger Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/core/machine.c | 2 ++ hw/tpm/tpm_crb.c | 3 +++ hw/tpm/tpm_tis.c | 3 +++ 3 files changed, 8 insertions(+) diff --git a/hw/core/machine.c b/hw/core/machine.c index f0c0ae6be8..2629515363 100644 --- a/hw/core/machine.c +++ b/hw/core/machine.c @@ -28,6 +28,8 @@ GlobalProperty hw_compat_3_1[] =3D { { "pcie-root-port", "x-width", "1" }, { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "tr= ue" }, { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "t= rue" }, + { "tpm-crb", "ppi", "false" }, + { "tpm-tis", "ppi", "false" }, }; const size_t hw_compat_3_1_len =3D G_N_ELEMENTS(hw_compat_3_1); =20 diff --git a/hw/tpm/tpm_crb.c b/hw/tpm/tpm_crb.c index a92dd50437..d5b0ac5920 100644 --- a/hw/tpm/tpm_crb.c +++ b/hw/tpm/tpm_crb.c @@ -41,6 +41,8 @@ typedef struct CRBState { MemoryRegion cmdmem; =20 size_t be_buffer_size; + + bool ppi_enabled; } CRBState; =20 #define CRB(obj) OBJECT_CHECK(CRBState, (obj), TYPE_TPM_CRB) @@ -221,6 +223,7 @@ static const VMStateDescription vmstate_tpm_crb =3D { =20 static Property tpm_crb_properties[] =3D { DEFINE_PROP_TPMBE("tpmdev", CRBState, tpmbe), + DEFINE_PROP_BOOL("ppi", CRBState, ppi_enabled, true), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/hw/tpm/tpm_tis.c b/hw/tpm/tpm_tis.c index 2563d7501f..1698d83cd3 100644 --- a/hw/tpm/tpm_tis.c +++ b/hw/tpm/tpm_tis.c @@ -81,6 +81,8 @@ typedef struct TPMState { TPMVersion be_tpm_version; =20 size_t be_buffer_size; + + bool ppi_enabled; } TPMState; =20 #define TPM(obj) OBJECT_CHECK(TPMState, (obj), TYPE_TPM_TIS) @@ -954,6 +956,7 @@ static const VMStateDescription vmstate_tpm_tis =3D { static Property tpm_tis_properties[] =3D { DEFINE_PROP_UINT32("irq", TPMState, irq_num, TPM_TIS_IRQ), DEFINE_PROP_TPMBE("tpmdev", TPMState, be_driver), + DEFINE_PROP_BOOL("ppi", TPMState, ppi_enabled, true), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 MST