From: "Emilio G. Cota" <cota@braap.org>
To: qemu-devel@nongnu.org
Cc: "Richard Henderson" <richard.henderson@linaro.org>,
"Alex Bennée" <alex.bennee@linaro.org>
Subject: [Qemu-devel] [PATCH v7 1/3] cputlb: do not evict empty entries to the vtlb
Date: Wed, 16 Jan 2019 12:01:12 -0500 [thread overview]
Message-ID: <20190116170114.26802-2-cota@braap.org> (raw)
In-Reply-To: <20190116170114.26802-1-cota@braap.org>
Currently we evict an entry to the victim TLB when it doesn't match
the current address. But it could be that there's no match because
the current entry is empty (i.e. all -1's, for instance via tlb_flush).
Do not evict the entry to the vtlb in that case.
This change will help us keep track of the TLB's use rate, which
we'll use to implement a policy for dynamic TLB sizing.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Emilio G. Cota <cota@braap.org>
---
accel/tcg/cputlb.c | 11 ++++++++++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index af6bd8ccf9..10f1150c62 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -224,6 +224,15 @@ static inline bool tlb_hit_page_anyprot(CPUTLBEntry *tlb_entry,
tlb_hit_page(tlb_entry->addr_code, page);
}
+/**
+ * tlb_entry_is_empty - return true if the entry is not in use
+ * @te: pointer to CPUTLBEntry
+ */
+static inline bool tlb_entry_is_empty(const CPUTLBEntry *te)
+{
+ return te->addr_read == -1 && te->addr_write == -1 && te->addr_code == -1;
+}
+
/* Called with tlb_c.lock held */
static inline void tlb_flush_entry_locked(CPUTLBEntry *tlb_entry,
target_ulong page)
@@ -591,7 +600,7 @@ void tlb_set_page_with_attrs(CPUState *cpu, target_ulong vaddr,
* Only evict the old entry to the victim tlb if it's for a
* different page; otherwise just overwrite the stale data.
*/
- if (!tlb_hit_page_anyprot(te, vaddr_page)) {
+ if (!tlb_hit_page_anyprot(te, vaddr_page) && !tlb_entry_is_empty(te)) {
unsigned vidx = env->tlb_d[mmu_idx].vindex++ % CPU_VTLB_SIZE;
CPUTLBEntry *tv = &env->tlb_v_table[mmu_idx][vidx];
--
2.17.1
next prev parent reply other threads:[~2019-01-16 17:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-16 17:01 [Qemu-devel] [PATCH v7 0/3] Dynamic TLB sizing Emilio G. Cota
2019-01-16 17:01 ` Emilio G. Cota [this message]
2019-01-16 17:01 ` [Qemu-devel] [PATCH v7 2/3] tcg: introduce dynamic " Emilio G. Cota
2019-01-18 15:01 ` Alex Bennée
2019-01-16 17:01 ` [Qemu-devel] [PATCH v7 3/3] tcg/i386: enable " Emilio G. Cota
2019-01-18 15:04 ` Alex Bennée
2019-01-18 15:30 ` Emilio G. Cota
2019-01-18 23:11 ` Richard Henderson
2019-01-17 16:31 ` [Qemu-devel] [PATCH v7 0/3] Dynamic " Alex Bennée
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