From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:42229) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gkU0K-0005Ae-Bc for qemu-devel@nongnu.org; Fri, 18 Jan 2019 08:16:13 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gkU0J-000802-5i for qemu-devel@nongnu.org; Fri, 18 Jan 2019 08:16:12 -0500 From: Bastian Koppelmann Date: Fri, 18 Jan 2019 14:14:51 +0100 Message-Id: <20190118131456.32451-31-kbastian@mail.uni-paderborn.de> In-Reply-To: <20190118131456.32451-1-kbastian@mail.uni-paderborn.de> References: <20190118131456.32451-1-kbastian@mail.uni-paderborn.de> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [Qemu-devel] [PATCH v4 30/35] target/riscv: Remove decode_RV32_64G() List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: sagark@eecs.berkeley.edu, palmer@sifive.com, Alistair.Francis@wdc.com, kbastian@mail.uni-paderborn.de Cc: qemu-riscv@nongnu.org, peer.adelt@hni.uni-paderborn.de, richard.henderson@linaro.org, qemu-devel@nongnu.org decodetree handles all instructions now so the fallback is not necessary anymore. Reviewed-by: Richard Henderson Signed-off-by: Bastian Koppelmann Signed-off-by: Peer Adelt --- target/riscv/translate.c | 23 +---------------------- 1 file changed, 1 insertion(+), 22 deletions(-) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 0e37beb68e..b0251b3518 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -600,26 +600,6 @@ bool decode_insn16(DisasContext *ctx, uint16_t insn); #include "decode_insn16.inc.c" #include "insn_trans/trans_rvc.inc.c" -static void decode_RV32_64G(CPURISCVState *env, DisasContext *ctx) -{ - uint32_t op; - - /* We do not do misaligned address check here: the address should never be - * misaligned at this point. Instructions that set PC must do the check, - * since epc must be the address of the instruction that caused us to - * perform the misaligned instruction fetch */ - - op = MASK_OP_MAJOR(ctx->opcode); - - switch (op) { - case OPC_RISC_SYSTEM: - break; - default: - gen_exception_illegal(ctx); - break; - } -} - static void decode_opc(DisasContext *ctx) { /* check for compressed insn */ @@ -636,8 +616,7 @@ static void decode_opc(DisasContext *ctx) } else { ctx->pc_succ_insn = ctx->base.pc_next + 4; if (!decode_insn32(ctx, ctx->opcode)) { - /* fallback to old decoder */ - decode_RV32_64G(ctx->env, ctx); + gen_exception_illegal(ctx); } } } -- 2.20.1