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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org
Subject: [Qemu-devel] [PATCH 12/23] hw/arm/armsse: Give each CPU its own view of memory
Date: Mon, 21 Jan 2019 18:51:07 +0000	[thread overview]
Message-ID: <20190121185118.18550-13-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190121185118.18550-1-peter.maydell@linaro.org>

Give each CPU its own container memory region. This is necessary
for two reasons:
 * some devices are instantiated one per CPU and the CPU sees only
   its own device
 * since a memory region can only be put into one container, we must
   give each armv7m object a different MemoryRegion as its 'memory'
   property, or a dual-CPU configuration will assert on realize when
   the second armv7m object tries to put the MR into a container when
   it is already in the first armv7m object's container

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 include/hw/arm/armsse.h | 10 ++++++++++
 hw/arm/armsse.c         | 22 ++++++++++++++++++++--
 2 files changed, 30 insertions(+), 2 deletions(-)

diff --git a/include/hw/arm/armsse.h b/include/hw/arm/armsse.h
index faf5dfed252..89f19a971f4 100644
--- a/include/hw/arm/armsse.h
+++ b/include/hw/arm/armsse.h
@@ -135,7 +135,17 @@ typedef struct ARMSSE {
     IoTKitSysCtl sysctl;
     IoTKitSysCtl sysinfo;
 
+    /*
+     * 'container' holds all devices seen by all CPUs.
+     * 'cpu_container[i]' is the view that CPU i has: this has the
+     * per-CPU devices of that CPU, plus as the background 'container'
+     * (or an alias of it, since we can only use it directly once).
+     * container_alias[i] is the alias of 'container' used by CPU i+1;
+     * CPU 0 can use 'container' directly.
+     */
     MemoryRegion container;
+    MemoryRegion container_alias[SSE_MAX_CPUS - 1];
+    MemoryRegion cpu_container[SSE_MAX_CPUS];
     MemoryRegion alias1;
     MemoryRegion alias2;
     MemoryRegion alias3;
diff --git a/hw/arm/armsse.c b/hw/arm/armsse.c
index 5cb2b78b1fc..2472dfef3a1 100644
--- a/hw/arm/armsse.c
+++ b/hw/arm/armsse.c
@@ -153,6 +153,15 @@ static void armsse_init(Object *obj)
         qdev_prop_set_string(DEVICE(&s->armv7m[i]), "cpu-type",
                              ARM_CPU_TYPE_NAME("cortex-m33"));
         g_free(name);
+        name = g_strdup_printf("arm-sse-cpu-container%d", i);
+        memory_region_init(&s->cpu_container[i], obj, name, UINT64_MAX);
+        g_free(name);
+        if (i > 0) {
+            name = g_strdup_printf("arm-sse-container-alias%d", i);
+            memory_region_init_alias(&s->container_alias[i - 1], obj,
+                                     name, &s->container, 0, UINT64_MAX);
+            g_free(name);
+        }
     }
 
     sysbus_init_child_obj(obj, "secctl", &s->secctl, sizeof(s->secctl),
@@ -332,7 +341,7 @@ static void armsse_realize(DeviceState *dev, Error **errp)
      * 0x50000000..0x5fffffff  alias of 0x40000000..0x4fffffff
      */
 
-    memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
+    memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -2);
 
     for (i = 0; i < info->num_cpus; i++) {
         DeviceState *cpudev = DEVICE(&s->armv7m[i]);
@@ -373,7 +382,16 @@ static void armsse_realize(DeviceState *dev, Error **errp)
                 return;
             }
         }
-        object_property_set_link(cpuobj, OBJECT(&s->container), "memory", &err);
+
+        if (i > 0) {
+            memory_region_add_subregion_overlap(&s->cpu_container[i], 0,
+                                                &s->container_alias[i - 1], -1);
+        } else {
+            memory_region_add_subregion_overlap(&s->cpu_container[i], 0,
+                                                &s->container, -1);
+        }
+        object_property_set_link(cpuobj, OBJECT(&s->cpu_container[i]),
+                                 "memory", &err);
         if (err) {
             error_propagate(errp, err);
             return;
-- 
2.20.1

  parent reply	other threads:[~2019-01-21 19:08 UTC|newest]

Thread overview: 53+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-21 18:50 [Qemu-devel] [PATCH 00/23] arm: Implement MPS2 AN521 FPGA image Peter Maydell
2019-01-21 18:50 ` [Qemu-devel] [PATCH 01/23] armv7m: Don't assume the NVIC's CPU is CPU 0 Peter Maydell
2019-01-21 20:26   ` Philippe Mathieu-Daudé
2019-01-23 23:44   ` Richard Henderson
2019-01-21 18:50 ` [Qemu-devel] [PATCH 02/23] armv7m: Make cpu object a child of the armv7m container Peter Maydell
2019-01-21 20:30   ` Philippe Mathieu-Daudé
2019-01-23 23:44   ` Richard Henderson
2019-01-21 18:50 ` [Qemu-devel] [PATCH 03/23] armv7m: Pass through start-powered-off CPU property Peter Maydell
2019-01-23 23:45   ` Richard Henderson
2019-01-21 18:50 ` [Qemu-devel] [PATCH 04/23] hw/arm/iotkit: Rename IoTKit to ARMSSE Peter Maydell
2019-01-21 20:32   ` Philippe Mathieu-Daudé
2019-01-25 23:46   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 05/23] hw/arm/iotkit: Refactor into abstract base class and subclass Peter Maydell
2019-01-22 11:01   ` Philippe Mathieu-Daudé
2019-01-25 23:52   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 06/23] hw/arm/iotkit: Rename 'iotkit' local variables and functions Peter Maydell
2019-01-22 11:02   ` Philippe Mathieu-Daudé
2019-01-25 23:52   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 07/23] hw/arm/iotkit: Rename files to hw/arm/armsse.[ch] Peter Maydell
2019-01-22 11:03   ` Philippe Mathieu-Daudé
2019-01-26  0:01   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 08/23] hw/misc/iotkit-secctl: Support 4 internal MPCs Peter Maydell
2019-01-26  0:04   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 09/23] hw/arm/armsse: Make number of SRAM banks parameterised Peter Maydell
2019-01-26  0:06   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 10/23] hw/arm/armsse: Make SRAM bank size configurable Peter Maydell
2019-01-26  0:09   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 11/23] hw/arm/armsse: Support dual-CPU configuration Peter Maydell
2019-01-26  0:14   ` Richard Henderson
2019-01-21 18:51 ` Peter Maydell [this message]
2019-01-26  0:24   ` [Qemu-devel] [PATCH 12/23] hw/arm/armsse: Give each CPU its own view of memory Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 13/23] hw/arm/armsse: Put each CPU in its own cluster object Peter Maydell
2019-01-26  0:29   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 14/23] iotkit-sysinfo: Make SYS_VERSION and SYS_CONFIG configurable Peter Maydell
2019-01-26  0:32   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 15/23] hw/arm/armsse: Add unimplemented-device stubs for MHUs Peter Maydell
2019-01-26  0:36   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 16/23] hw/arm/armsse: Add unimplemented-device stubs for PPUs Peter Maydell
2019-01-28 16:17   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 17/23] hw/arm/armsse: Add unimplemented-device stub for cache control registers Peter Maydell
2019-01-28 16:24   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 18/23] hw/arm/armsse: Add unimplemented-device stub for CPU local " Peter Maydell
2019-01-28 16:25   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 19/23] hw/misc/armsse-cpuid: Implement SSE-200 CPU_IDENTITY register block Peter Maydell
2019-01-28 16:26   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 20/23] hw/arm/armsse: Add CPU_IDENTITY block to SSE-200 Peter Maydell
2019-01-28 16:27   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 21/23] hw/arm/armsse: Add SSE-200 model Peter Maydell
2019-01-28 16:28   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 22/23] hw/arm/mps2-tz: Add IRQ infrastructure to support SSE-200 Peter Maydell
2019-01-28 16:31   ` Richard Henderson
2019-01-21 18:51 ` [Qemu-devel] [PATCH 23/23] hw/arm/mps2-tz: Add mps2-an521 model Peter Maydell
2019-01-28 16:33   ` Richard Henderson

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