From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:38732) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gmNpZ-0001ca-G6 for qemu-devel@nongnu.org; Wed, 23 Jan 2019 14:04:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gmNpY-0002zz-GM for qemu-devel@nongnu.org; Wed, 23 Jan 2019 14:04:57 -0500 Received: from mx1.redhat.com ([209.132.183.28]:37654) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1gmNpW-0002wP-O5 for qemu-devel@nongnu.org; Wed, 23 Jan 2019 14:04:56 -0500 Date: Wed, 23 Jan 2019 12:04:38 -0700 From: Alex Williamson Message-ID: <20190123120438.2d47e352@w520.home> In-Reply-To: <1062e3d54121ff3e19b5a4e821ae178c5387fd9a.1548266832.git-series.knut.omang@oracle.com> References: <1062e3d54121ff3e19b5a4e821ae178c5387fd9a.1548266832.git-series.knut.omang@oracle.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH 2/2] gen_pcie_root_port: Add ACS (Access Control Services) capability List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Knut Omang Cc: qemu-devel@nongnu.org, "Michael S . Tsirkin" , Marcel Apfelbaum , Tal Attaly , Elijah Shakkour , Stefan Hajnoczi On Wed, 23 Jan 2019 19:28:00 +0100 Knut Omang wrote: > Claiming ACS support allows passthrough of an emulated device > (in a nested virt.setting) with VFIO without Alex Williamson's patch > for the pcie_acs_override kernel parameter. > A similar need appears on Windows with Hyper-V > > Signed-off-by: Knut Omang > --- > hw/pci-bridge/gen_pcie_root_port.c | 2 ++ > hw/pci-bridge/ioh3420.c | 1 - > hw/pci-bridge/pcie_root_port.c | 3 +++ > include/hw/pci/pcie_port.h | 1 + > 4 files changed, 6 insertions(+), 1 deletion(-) > > diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_root_port.c > index 9766edb..b5a5ecc 100644 > --- a/hw/pci-bridge/gen_pcie_root_port.c > +++ b/hw/pci-bridge/gen_pcie_root_port.c > @@ -20,6 +20,7 @@ > OBJECT_CHECK(GenPCIERootPort, (obj), TYPE_GEN_PCIE_ROOT_PORT) > > #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100 > +#define GEN_PCIE_ROOT_PORT_ACS_OFFSET 0x148 Perhaps (GEN_PCIE_ROOT_PORT_AER_OFFSET + PCI_ERR_SIZEOF) > #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1 > > typedef struct GenPCIERootPort { > @@ -149,6 +150,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass, void *data) > rpc->interrupts_init = gen_rp_interrupts_init; > rpc->interrupts_uninit = gen_rp_interrupts_uninit; > rpc->aer_offset = GEN_PCIE_ROOT_PORT_AER_OFFSET; > + rpc->acs_offset = GEN_PCIE_ROOT_PORT_ACS_OFFSET; > } > > static const TypeInfo gen_rp_dev_info = { > diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c > index 81f2de6..2064939 100644 > --- a/hw/pci-bridge/ioh3420.c > +++ b/hw/pci-bridge/ioh3420.c > @@ -71,7 +71,6 @@ static int ioh3420_interrupts_init(PCIDevice *d, Error **errp) > if (rc < 0) { > assert(rc == -ENOTSUP); > } > - Unrelated > return rc; > } > > diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c > index 34ad767..c33a493 100644 > --- a/hw/pci-bridge/pcie_root_port.c > +++ b/hw/pci-bridge/pcie_root_port.c > @@ -106,6 +106,9 @@ static void rp_realize(PCIDevice *d, Error **errp) > pcie_aer_root_init(d); > rp_aer_vector_update(d); > > + if (rpc->acs_offset) { > + pcie_acs_init(d, rpc->acs_offset, 0); > + } > return; > > err: > diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h > index df242a0..09586f4 100644 > --- a/include/hw/pci/pcie_port.h > +++ b/include/hw/pci/pcie_port.h > @@ -78,6 +78,7 @@ typedef struct PCIERootPortClass { > int exp_offset; > int aer_offset; > int ssvid_offset; > + int acs_offset; /* If nonzero, optional ACS capability offset */ > int ssid; > } PCIERootPortClass; >