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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org, Laurent Desnogues <laurent.desnogues@gmail.com>
Subject: [Qemu-devel] [PATCH 1/7] target/arm/translate-a64: Don't underdecode system instructions
Date: Fri, 25 Jan 2019 18:26:20 +0000	[thread overview]
Message-ID: <20190125182626.9221-2-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190125182626.9221-1-peter.maydell@linaro.org>

The "system instructions" and "system register move" subcategories
of "branches, exception generating and system instructions" for A64
only apply if bits [23:22] are zero; other values are currently
unallocated. Correctly UNDEF these unallocated encodings.

Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate-a64.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 4d28a27c3bd..e6df303e321 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2144,7 +2144,11 @@ static void disas_b_exc_sys(DisasContext *s, uint32_t insn)
         break;
     case 0x6a: /* Exception generation / System */
         if (insn & (1 << 24)) {
-            disas_system(s, insn);
+            if (extract32(insn, 22, 2) == 0) {
+                disas_system(s, insn);
+            } else {
+                unallocated_encoding(s);
+            }
         } else {
             disas_exc(s, insn);
         }
-- 
2.20.1

  reply	other threads:[~2019-01-25 18:26 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-25 18:26 [Qemu-devel] [PATCH 0/7] target/arm: Fix various underdecodings Peter Maydell
2019-01-25 18:26 ` Peter Maydell [this message]
2019-01-28 11:09   ` [Qemu-devel] [PATCH 1/7] target/arm/translate-a64: Don't underdecode system instructions Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 2/7] target/arm/translate-a64: Don't underdecode PRFM Peter Maydell
2019-01-28 11:10   ` Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 3/7] target/arm/translate-a64: Don't underdecode SIMD ld/st multiple Peter Maydell
2019-01-28 11:11   ` Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 4/7] target/arm/translate-a64: Don't underdecode SIMD ld/st single Peter Maydell
2019-01-28 11:13   ` Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 5/7] target/arm/translate-a64: Don't underdecode add/sub extended register Peter Maydell
2019-01-28 11:16   ` Laurent Desnogues
2019-01-28 11:17     ` Peter Maydell
2019-01-25 18:26 ` [Qemu-devel] [PATCH 6/7] target/arm/translate-a64: Don't underdecode FP insns Peter Maydell
2019-01-28 11:19   ` Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 7/7] target/arm/translate-a64: Don't underdecode SDOT and UDOT Peter Maydell
2019-01-28 11:20   ` Laurent Desnogues

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