From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-arm@nongnu.org, qemu-devel@nongnu.org
Cc: patches@linaro.org, Laurent Desnogues <laurent.desnogues@gmail.com>
Subject: [Qemu-devel] [PATCH 2/7] target/arm/translate-a64: Don't underdecode PRFM
Date: Fri, 25 Jan 2019 18:26:21 +0000 [thread overview]
Message-ID: <20190125182626.9221-3-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190125182626.9221-1-peter.maydell@linaro.org>
The PRFM prefetch insn in the load/store with imm9 encodings
requires idx field 0b00; we were underdecoding this by
only checking !is_unpriv (which is equivalent to idx != 2).
Correctly UNDEF the unallocated encodings where idx == 0b01
and 0b11 as well as 0b10.
Reported-by: Laurent Desnogues <laurent.desnogues@gmail.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
target/arm/translate-a64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index e6df303e321..8e081758e03 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2803,7 +2803,7 @@ static void disas_ldst_reg_imm9(DisasContext *s, uint32_t insn,
} else {
if (size == 3 && opc == 2) {
/* PRFM - prefetch */
- if (is_unpriv) {
+ if (idx != 0) {
unallocated_encoding(s);
return;
}
--
2.20.1
next prev parent reply other threads:[~2019-01-25 18:26 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-25 18:26 [Qemu-devel] [PATCH 0/7] target/arm: Fix various underdecodings Peter Maydell
2019-01-25 18:26 ` [Qemu-devel] [PATCH 1/7] target/arm/translate-a64: Don't underdecode system instructions Peter Maydell
2019-01-28 11:09 ` Laurent Desnogues
2019-01-25 18:26 ` Peter Maydell [this message]
2019-01-28 11:10 ` [Qemu-devel] [PATCH 2/7] target/arm/translate-a64: Don't underdecode PRFM Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 3/7] target/arm/translate-a64: Don't underdecode SIMD ld/st multiple Peter Maydell
2019-01-28 11:11 ` Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 4/7] target/arm/translate-a64: Don't underdecode SIMD ld/st single Peter Maydell
2019-01-28 11:13 ` Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 5/7] target/arm/translate-a64: Don't underdecode add/sub extended register Peter Maydell
2019-01-28 11:16 ` Laurent Desnogues
2019-01-28 11:17 ` Peter Maydell
2019-01-25 18:26 ` [Qemu-devel] [PATCH 6/7] target/arm/translate-a64: Don't underdecode FP insns Peter Maydell
2019-01-28 11:19 ` Laurent Desnogues
2019-01-25 18:26 ` [Qemu-devel] [PATCH 7/7] target/arm/translate-a64: Don't underdecode SDOT and UDOT Peter Maydell
2019-01-28 11:20 ` Laurent Desnogues
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