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From: Eduardo Habkost <ehabkost@redhat.com>
To: Tao Xu <tao3.xu@intel.com>
Cc: pbonzini@redhat.com, rth@twiddle.net, qemu-devel@nongnu.org,
	robert.hu@linux.intel.com, thomas.lendacky@amd.com,
	xuelian.guo@intel.com
Subject: Re: [Qemu-devel] [PATCH 2/2] i386: Add some MSR based features on Cascadelake-Server CPU model
Date: Mon, 28 Jan 2019 12:48:48 -0200	[thread overview]
Message-ID: <20190128144848.GS4136@habkost.net> (raw)
In-Reply-To: <ab92f502-bc96-34fd-0b21-6d1918648549@intel.com>

On Mon, Jan 28, 2019 at 04:33:40PM +0800, Tao Xu wrote:
> On 1/24/2019 3:15 AM, Eduardo Habkost wrote:
> > On Mon, Jan 21, 2019 at 05:29:32PM +0800, Tao Xu wrote:
> > > On 1/15/2019 2:35 AM, Eduardo Habkost wrote:
> > > > Sorry, we do have a problem here:
> > > > 
> > > > On Thu, Dec 27, 2018 at 10:43:04AM +0800, Tao Xu wrote:
> > > > [...]
> > > > >    #define PC_COMPAT_3_0 \
> > > > > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > > > > index 09706ad51a..5296c73cd5 100644
> > > > > --- a/target/i386/cpu.c
> > > > > +++ b/target/i386/cpu.c
> > > > > @@ -2499,7 +2499,8 @@ static X86CPUDefinition builtin_x86_defs[] = {
> > > > >                CPUID_7_0_ECX_PKU | CPUID_7_0_ECX_OSPKE |
> > > > >                CPUID_7_0_ECX_AVX512VNNI,
> > > > >            .features[FEAT_7_0_EDX] =
> > > > > -            CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD,
> > > > > +            CPUID_7_0_EDX_SPEC_CTRL | CPUID_7_0_EDX_SPEC_CTRL_SSBD |
> > > > > +            CPUID_7_0_EDX_ARCH_CAPABILITIES,
> > > > 
> > > > CPUID_7_0_EDX_ARCH_CAPABILITIES is still set on
> > > > unmigratable_flags.  We need to make it migratable before adding
> > > > it by default to a named CPU model.
> > > > 
> > > Hi Eduardo,
> > > 
> > > Do you mean I need to remove CPUID_7_0_EDX_ARCH_CAPABILITIES
> > > from .migratable_flags? Or CPUID_7_0_EDX_ARCH_CAPABILITIES can not
> > > support migration now?
> > 
> > We need to remove it from .unmigratable_flags, but only after
> > confirm it is really migration-safe.  To make it migration-safe,
> > the MSR value seen by the guest must have a predictable value
> > that is 100% independent from host hardware or host software
> > version.
> > 
> > This is easy to ensure if MSR_IA32_ARCH_CAPABILITIES is in
> > KVM_GET_MSR_INDEX_LIST (meaning QEMU can actually configure the
> > MSR value seen by the guest).  If MSR_IA32_ARCH_CAPABILITIES is
> > not on KVM_GET_MSR_INDEX_LIST, arch-capabilities must not be
> > returned by x86_cpu_get_supported_feature_word() when
> > migratable_only is true.
> > 
> Thank you. I have seen your patch to migratable it:
> 
> [PATCH 0/2] i386: arch_capabilities fixes + migratability
> http://lists.nongnu.org/archive/html/qemu-devel/2019-01/msg06701.html
> 
> So now can arch-capabilities and features exposed by it be added in
> Cascadelake CPU model? Because Cascadelake CPU model can support it in
> hardware. And for Icelake CPU model, Robert will add in the future.

Even if there's host hardware support for the MSR, the feature
still depends on a KVM commit added in Linux v6.16 (commit
28c1c9fabf48 "KVM/VMX: Emulate MSR_IA32_ARCH_CAPABILITIES").  We
would still have the kernel version dependency described below.


> > 
> > > 
> > > > Also, why are you setting this only on Cascadelake-Server and not
> > > > on all the other Intel CPUs?
> > > > 
> > > Thank you for your notice. I reviewed the git log of KVM.
> > > "MSR_IA32_ARCH_CAPABILITIES is emulated in kvm, there is no dependency on
> > > hardware support for this feature". So do you mean we should also add
> > > features based on ARCH_CAPABILITIES in former CPU(such as skylake)?
> > 
> > It doesn't depend on host hardware features, but it does depend
> > on host KVM code added in Linux v4.17, which makes this more
> > tricky.
> > 
> > We don't want a QEMU upgrade to make an existing VM configuration
> > to stop running under Linux v4.16.  This will probably require
> > versioned CPU models[1] to work well.
> > 
> > [1] https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg08422.html
> > 
> Hi Eduardo, I think the versioned CPU models solution is great. But I
> haven't seen further patches in the mail list. What is the recent progress
> of this work? Need me to do something?

Nothing was done to implement this yet.  Before implementing it,
I'd like to get decent automated test coverage for CPUID
compatibility.  Keeping compatibility with non-versioned CPU
models is already too error-prone today, and I don't want to make
the situation worse.  I have an old branch where I was working on
it, at:
https://github.com/ehabkost/qemu-hacks/commits/work/guest-abi-tests

Unfortunately I'll be away from work for the next 4 weeks, so
I'll need to get back to this discussion after I'm back.

-- 
Eduardo

  reply	other threads:[~2019-01-28 14:48 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-12-27  2:43 [Qemu-devel] [PATCH 0/2] Add MSR based features on Cascadelake CPU model Tao Xu
2018-12-27  2:43 ` [Qemu-devel] [PATCH 1/2] i386: Update stepping of Cascadelake-Server Tao Xu
2018-12-27  2:43 ` [Qemu-devel] [PATCH 2/2] i386: Add some MSR based features on Cascadelake-Server CPU model Tao Xu
2019-01-14 18:35   ` Eduardo Habkost
2019-01-21  9:29     ` Tao Xu
2019-01-23 19:15       ` Eduardo Habkost
2019-01-28  8:33         ` Tao Xu
2019-01-28 14:48           ` Eduardo Habkost [this message]
2019-01-29  8:55             ` Tao Xu
2019-03-08 18:56               ` Eduardo Habkost
2019-01-02  1:16 ` [Qemu-devel] [PATCH 0/2] Add MSR based features on Cascadelake " Tao Xu
2019-01-02  1:20 ` Tao Xu
2019-01-14 18:16 ` Eduardo Habkost

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