From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:59408) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gog2U-0004I3-VW for qemu-devel@nongnu.org; Tue, 29 Jan 2019 21:55:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gog2S-0001Yq-51 for qemu-devel@nongnu.org; Tue, 29 Jan 2019 21:55:46 -0500 Received: from mail-pl1-x644.google.com ([2607:f8b0:4864:20::644]:39871) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gog2R-0001Vt-Rn for qemu-devel@nongnu.org; Tue, 29 Jan 2019 21:55:44 -0500 Received: by mail-pl1-x644.google.com with SMTP id 101so10351221pld.6 for ; Tue, 29 Jan 2019 18:55:36 -0800 (PST) From: Jim Wilson Date: Tue, 29 Jan 2019 18:55:28 -0800 Message-Id: <20190130025528.12560-1-jimw@sifive.com> In-Reply-To: References: Subject: [Qemu-devel] [PATCH 2/5 v3] RISC-V: Add 64-bit gdb xml files. List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-riscv@nongnu.org, Jim Wilson Signed-off-by: Jim Wilson --- configure | 1 + gdb-xml/riscv-64bit-cpu.xml | 43 ++++++++ gdb-xml/riscv-64bit-csr.xml | 250 ++++++++++++++++++++++++++++++++++++++++++++ gdb-xml/riscv-64bit-fpu.xml | 52 +++++++++ 4 files changed, 346 insertions(+) create mode 100644 gdb-xml/riscv-64bit-cpu.xml create mode 100644 gdb-xml/riscv-64bit-csr.xml create mode 100644 gdb-xml/riscv-64bit-fpu.xml diff --git a/configure b/configure index f30369a..5e71d28 100755 --- a/configure +++ b/configure @@ -7290,6 +7290,7 @@ case "$target_name" in TARGET_BASE_ARCH=riscv TARGET_ABI_DIR=riscv mttcg=yes + gdb_xml_files="riscv-64bit-cpu.xml riscv-64bit-fpu.xml riscv-64bit-csr.xml" target_compiler=$cross_cc_riscv64 ;; sh4|sh4eb) diff --git a/gdb-xml/riscv-64bit-cpu.xml b/gdb-xml/riscv-64bit-cpu.xml new file mode 100644 index 0000000..f37d7f3 --- /dev/null +++ b/gdb-xml/riscv-64bit-cpu.xml @@ -0,0 +1,43 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/riscv-64bit-csr.xml b/gdb-xml/riscv-64bit-csr.xml new file mode 100644 index 0000000..a3de834 --- /dev/null +++ b/gdb-xml/riscv-64bit-csr.xml @@ -0,0 +1,250 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/gdb-xml/riscv-64bit-fpu.xml b/gdb-xml/riscv-64bit-fpu.xml new file mode 100644 index 0000000..fb24b72 --- /dev/null +++ b/gdb-xml/riscv-64bit-fpu.xml @@ -0,0 +1,52 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + -- 2.7.4