From: Stefan Hajnoczi <stefanha@redhat.com>
To: qemu-devel@nongnu.org
Cc: "Laurent Vivier" <lvivier@redhat.com>,
"Thomas Huth" <thuth@redhat.com>,
jim@groklearning.com, "Steffen Görtz" <contrib@steffen-goertz.de>,
"Joel Stanley" <joel@jms.id.au>,
"Peter Maydell" <peter.maydell@linaro.org>,
jusual@mail.ru, "Paolo Bonzini" <pbonzini@redhat.com>,
qemu-arm@nongnu.org, "Stefan Hajnoczi" <stefanha@redhat.com>
Subject: [Qemu-devel] [PATCH v3 2/3] arm: Instantiate NRF51 special NVM's and NVMC
Date: Wed, 30 Jan 2019 15:21:30 +0800 [thread overview]
Message-ID: <20190130072131.13247-3-stefanha@redhat.com> (raw)
In-Reply-To: <20190130072131.13247-1-stefanha@redhat.com>
From: Steffen Görtz <contrib@steffen-goertz.de>
Instantiates UICR, FICR, FLASH and NVMC in nRF51 SOC.
Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
---
include/hw/arm/nrf51_soc.h | 2 ++
hw/arm/nrf51_soc.c | 41 +++++++++++++++++++++++++++-----------
2 files changed, 31 insertions(+), 12 deletions(-)
diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h
index fbdefc07e4..fd7fcc71a5 100644
--- a/include/hw/arm/nrf51_soc.h
+++ b/include/hw/arm/nrf51_soc.h
@@ -15,6 +15,7 @@
#include "hw/char/nrf51_uart.h"
#include "hw/misc/nrf51_rng.h"
#include "hw/gpio/nrf51_gpio.h"
+#include "hw/nvram/nrf51_nvm.h"
#include "hw/timer/nrf51_timer.h"
#define TYPE_NRF51_SOC "nrf51-soc"
@@ -32,6 +33,7 @@ typedef struct NRF51State {
NRF51UARTState uart;
NRF51RNGState rng;
+ NRF51NVMState nvm;
NRF51GPIOState gpio;
NRF51TimerState timer[NRF51_NUM_TIMERS];
diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c
index 1630c27594..b839daea8b 100644
--- a/hw/arm/nrf51_soc.c
+++ b/hw/arm/nrf51_soc.c
@@ -29,8 +29,10 @@
* are supported in the future, add a sub-class of NRF51SoC for
* the specific variants
*/
-#define NRF51822_FLASH_SIZE (256 * NRF51_PAGE_SIZE)
-#define NRF51822_SRAM_SIZE (16 * NRF51_PAGE_SIZE)
+#define NRF51822_FLASH_PAGES 256
+#define NRF51822_SRAM_PAGES 16
+#define NRF51822_FLASH_SIZE (NRF51822_FLASH_PAGES * NRF51_PAGE_SIZE)
+#define NRF51822_SRAM_SIZE (NRF51822_SRAM_PAGES * NRF51_PAGE_SIZE)
#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
@@ -81,14 +83,6 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
memory_region_add_subregion_overlap(&s->container, 0, s->board_memory, -1);
- memory_region_init_rom(&s->flash, OBJECT(s), "nrf51.flash", s->flash_size,
- &err);
- if (err) {
- error_propagate(errp, err);
- return;
- }
- memory_region_add_subregion(&s->container, NRF51_FLASH_BASE, &s->flash);
-
memory_region_init_ram(&s->sram, NULL, "nrf51.sram", s->sram_size, &err);
if (err) {
error_propagate(errp, err);
@@ -121,6 +115,29 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
qdev_get_gpio_in(DEVICE(&s->cpu),
BASE_TO_IRQ(NRF51_RNG_BASE)));
+ /* UICR, FICR, NVMC, FLASH */
+ object_property_set_uint(OBJECT(&s->nvm), s->flash_size, "flash-size",
+ &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
+ object_property_set_bool(OBJECT(&s->nvm), true, "realized", &err);
+ if (err) {
+ error_propagate(errp, err);
+ return;
+ }
+
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 0);
+ memory_region_add_subregion_overlap(&s->container, NRF51_NVMC_BASE, mr, 0);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 1);
+ memory_region_add_subregion_overlap(&s->container, NRF51_FICR_BASE, mr, 0);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 2);
+ memory_region_add_subregion_overlap(&s->container, NRF51_UICR_BASE, mr, 0);
+ mr = sysbus_mmio_get_region(SYS_BUS_DEVICE(&s->nvm), 3);
+ memory_region_add_subregion_overlap(&s->container, NRF51_FLASH_BASE, mr, 0);
+
/* GPIO */
object_property_set_bool(OBJECT(&s->gpio), true, "realized", &err);
if (err) {
@@ -158,8 +175,6 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE,
NRF51_IOMEM_SIZE);
- create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE,
- NRF51_FICR_SIZE);
create_unimplemented_device("nrf51_soc.private",
NRF51_PRIVATE_BASE, NRF51_PRIVATE_SIZE);
}
@@ -186,6 +201,8 @@ static void nrf51_soc_init(Object *obj)
sysbus_init_child_obj(obj, "rng", &s->rng, sizeof(s->rng),
TYPE_NRF51_RNG);
+ sysbus_init_child_obj(obj, "nvm", &s->nvm, sizeof(s->nvm), TYPE_NRF51_NVM);
+
sysbus_init_child_obj(obj, "gpio", &s->gpio, sizeof(s->gpio),
TYPE_NRF51_GPIO);
--
2.20.1
next prev parent reply other threads:[~2019-01-30 7:22 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-30 7:21 [Qemu-devel] [PATCH v3 0/3] arm: microbit Non-Volatile Memory Controller Stefan Hajnoczi
2019-01-30 7:21 ` [Qemu-devel] [PATCH v3 1/3] hw/nvram/nrf51_nvm: Add nRF51 non-volatile memories Stefan Hajnoczi
2019-01-31 13:24 ` Peter Maydell
2019-01-30 7:21 ` Stefan Hajnoczi [this message]
2019-01-30 7:21 ` [Qemu-devel] [PATCH v3 3/3] tests/microbit-test: Add tests for nRF51 NVMC Stefan Hajnoczi
2019-01-31 13:25 ` Peter Maydell
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