[Qemu-devel] [PATCH RISU 0/2] Do not enable --sve by default

[Qemu-devel] [PATCH RISU 0/2] Do not enable --sve by default

[Richard Henderson]

In the process of noticing what the problem was, 
add fp regs to the aarch64 smoke test.


r~


Richard Henderson (2):
  aarch64: Fill in fp regs for test_aarch64.s
  risugen: Default to sve off

 risugen        |  3 ++-
 test_aarch64.s | 34 ++++++++++++++++++++++++++++++++++
 2 files changed, 36 insertions(+), 1 deletion(-)

-- 
2.17.2

[Qemu-devel] [PATCH RISU 1/2] aarch64: Fill in fp regs for test_aarch64.s

[Richard Henderson]

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 test_aarch64.s | 34 ++++++++++++++++++++++++++++++++++
 1 file changed, 34 insertions(+)

diff --git a/test_aarch64.s b/test_aarch64.s
index d5a8495..f75d588 100644
--- a/test_aarch64.s
+++ b/test_aarch64.s
@@ -43,6 +43,40 @@ mov w28, 28
 mov w29, 29
 mov w30, 30
 
+/* Initialise the fp regs */
+movi d0, #0
+fmov d1, #1.0
+fmov d2, #2.0
+fmov d3, #3.0
+fmov d4, #4.0
+fmov d5, #5.0
+fmov d6, #6.0
+fmov d7, #7.0
+fmov d8, #8.0
+fmov d9, #9.0
+fmov d10, #10.0
+fmov d11, #11.0
+fmov d12, #12.0
+fmov d13, #13.0
+fmov d14, #14.0
+fmov d15, #15.0
+fmov d16, #16.0
+fmov d17, #17.0
+fmov d18, #18.0
+fmov d19, #19.0
+fmov d20, #20.0
+fmov d21, #21.0
+fmov d22, #22.0
+fmov d23, #23.0
+fmov d24, #24.0
+fmov d25, #25.0
+fmov d26, #26.0
+fmov d27, #27.0
+fmov d28, #28.0
+fmov d29, #29.0
+fmov d30, #30.0
+fmov d31, #31.0
+
 /* do compare.
  * The manual says instr with bits (28,27) == 0 0 are UNALLOCATED
  */
-- 
2.17.2

[Qemu-devel] [PATCH RISU 2/2] risugen: Default to sve off

[Richard Henderson]

We had an --sve switch, which would also enable sve,
but no way to turn sve off.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 risugen | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/risugen b/risugen
index de3f5ea..e690b18 100755
--- a/risugen
+++ b/risugen
@@ -308,6 +308,7 @@ Valid options:
                    a general set you have excluded.
     --no-fp      : disable floating point: no fp init, randomization etc.
                    Useful to test before support for FP is available.
+    --sve        : enable sve floating point
     --be         : generate instructions in Big-Endian byte order (ppc64 only).
     --help       : print this message
 EOT
@@ -319,7 +320,7 @@ sub main()
     my $condprob = 0;
     my $fpscr = 0;
     my $fp_enabled = 1;
-    my $sve_enabled = 1;
+    my $sve_enabled = 0;
     my $big_endian = 0;
     my ($infile, $outfile);
 
-- 
2.17.2

Re: [Qemu-devel] [PATCH RISU 0/2] Do not enable --sve by default

[Peter Maydell]

On Wed, 6 Feb 2019 at 10:14, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> In the process of noticing what the problem was,
> add fp regs to the aarch64 smoke test.
>
>

Applied to risu master, thanks.

-- PMM