From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH RISU 1/2] aarch64: Fill in fp regs for test_aarch64.s
Date: Wed, 6 Feb 2019 10:14:45 +0000 [thread overview]
Message-ID: <20190206101446.6898-2-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190206101446.6898-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
test_aarch64.s | 34 ++++++++++++++++++++++++++++++++++
1 file changed, 34 insertions(+)
diff --git a/test_aarch64.s b/test_aarch64.s
index d5a8495..f75d588 100644
--- a/test_aarch64.s
+++ b/test_aarch64.s
@@ -43,6 +43,40 @@ mov w28, 28
mov w29, 29
mov w30, 30
+/* Initialise the fp regs */
+movi d0, #0
+fmov d1, #1.0
+fmov d2, #2.0
+fmov d3, #3.0
+fmov d4, #4.0
+fmov d5, #5.0
+fmov d6, #6.0
+fmov d7, #7.0
+fmov d8, #8.0
+fmov d9, #9.0
+fmov d10, #10.0
+fmov d11, #11.0
+fmov d12, #12.0
+fmov d13, #13.0
+fmov d14, #14.0
+fmov d15, #15.0
+fmov d16, #16.0
+fmov d17, #17.0
+fmov d18, #18.0
+fmov d19, #19.0
+fmov d20, #20.0
+fmov d21, #21.0
+fmov d22, #22.0
+fmov d23, #23.0
+fmov d24, #24.0
+fmov d25, #25.0
+fmov d26, #26.0
+fmov d27, #27.0
+fmov d28, #28.0
+fmov d29, #29.0
+fmov d30, #30.0
+fmov d31, #31.0
+
/* do compare.
* The manual says instr with bits (28,27) == 0 0 are UNALLOCATED
*/
--
2.17.2
next prev parent reply other threads:[~2019-02-06 10:14 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-06 10:14 [Qemu-devel] [PATCH RISU 0/2] Do not enable --sve by default Richard Henderson
2019-02-06 10:14 ` Richard Henderson [this message]
2019-02-06 10:14 ` [Qemu-devel] [PATCH RISU 2/2] risugen: Default to sve off Richard Henderson
2019-02-08 13:15 ` [Qemu-devel] [PATCH RISU 0/2] Do not enable --sve by default Peter Maydell
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