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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org
Subject: [Qemu-devel] [PATCH v2 16/26] target/arm: Implement the STGP instruction
Date: Sun, 10 Feb 2019 17:08:19 -0800	[thread overview]
Message-ID: <20190211010829.29869-17-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190211010829.29869-1-richard.henderson@linaro.org>

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/arm/translate-a64.c | 18 ++++++++++++++++--
 1 file changed, 16 insertions(+), 2 deletions(-)

diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 539c25a80b..9bd68d522c 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -2701,7 +2701,7 @@ static void disas_ld_lit(DisasContext *s, uint32_t insn)
  * +-----+-------+---+---+-------+---+-------+-------+------+------+
  *
  * opc: LDP/STP/LDNP/STNP        00 -> 32 bit, 10 -> 64 bit
- *      LDPSW                    01
+ *      LDPSW/STGP               01
  *      LDP/STP/LDNP/STNP (SIMD) 00 -> 32 bit, 01 -> 64 bit, 10 -> 128 bit
  *   V: 0 -> GPR, 1 -> Vector
  * idx: 00 -> signed offset with non-temporal hint, 01 -> post-index,
@@ -2726,6 +2726,7 @@ static void disas_ldst_pair(DisasContext *s, uint32_t insn)
     bool is_signed = false;
     bool postindex = false;
     bool wback = false;
+    bool set_tag = false;
 
     TCGv_i64 clean_addr, dirty_addr;
 
@@ -2738,6 +2739,14 @@ static void disas_ldst_pair(DisasContext *s, uint32_t insn)
 
     if (is_vector) {
         size = 2 + opc;
+    } else if (opc == 1 && !is_load) {
+        /* STGP */
+        if (!dc_isar_feature(aa64_mte_insn_reg, s) || index == 0) {
+            unallocated_encoding(s);
+            return;
+        }
+        size = 3;
+        set_tag = true;
     } else {
         size = 2 + extract32(opc, 1, 1);
         is_signed = extract32(opc, 0, 1);
@@ -2788,7 +2797,12 @@ static void disas_ldst_pair(DisasContext *s, uint32_t insn)
     if (!postindex) {
         tcg_gen_addi_i64(dirty_addr, dirty_addr, offset);
     }
-    clean_addr = clean_data_tbi(s, dirty_addr, wback || rn != 31);
+    if (set_tag) {
+        clean_addr = new_tmp_a64(s);
+        gen_helper_stg(clean_addr, cpu_env, dirty_addr);
+    } else {
+        clean_addr = clean_data_tbi(s, dirty_addr, wback || rn != 31);
+    }
 
     if (is_vector) {
         if (is_load) {
-- 
2.17.2

  parent reply	other threads:[~2019-02-11  1:09 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-11  1:08 [Qemu-devel] [PATCH v2 00/26] target/arm: Implement ARMv8.5-MemTag Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 01/26] target/arm: Split out arm_sctlr Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 02/26] target/arm: Split helper_msr_i_pstate into 3 Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 03/26] target/arm: Add clear_pstate_bits, share gen_ss_advance Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 04/26] target/arm: Add MTE_ACTIVE to tb_flags Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 05/26] target/arm: Extract TCMA with ARMVAParameters Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 06/26] target/arm: Add MTE system registers Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 07/26] target/arm: Assert no manual change to CACHED_PSTATE_BITS Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 08/26] target/arm: Fill in helper_mte_check Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 09/26] target/arm: Suppress tag check for sp+offset Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 10/26] target/arm: Implement the IRG instruction Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 11/26] target/arm: Implement ADDG, SUBG instructions Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 12/26] target/arm: Implement the GMI instruction Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 13/26] target/arm: Implement the SUBP instruction Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 14/26] target/arm: Define arm_cpu_do_unaligned_access for CONFIG_USER_ONLY Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 15/26] target/arm: Implement LDG, STG, ST2G instructions Richard Henderson
2019-02-11  1:08 ` Richard Henderson [this message]
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 17/26] target/arm: Implement the access tag cache flushes Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 18/26] target/arm: Implement data cache set allocation tags Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 19/26] target/arm: Set PSTATE.TCO on exception entry Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 20/26] tcg: Introduce target-specific page data for user-only Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 21/26] target/arm: Cache the Tagged bit for a page in MemTxAttrs Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 22/26] target/arm: Create tagged ram when MTE is enabled Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 23/26] target/arm: Add allocation tag storage for user mode Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 24/26] target/arm: Add allocation tag storage for system mode Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 25/26] target/arm: Enable MTE Richard Henderson
2019-02-11  1:08 ` [Qemu-devel] [PATCH v2 26/26] tests/tcg/aarch64: Add mte smoke tests Richard Henderson

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