From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
Benjamin Herrenschmidt <benh@kernel.crashing.org>
Subject: Re: [Qemu-devel] [PATCH 16/19] target/ppc: Add Hypervisor Virtualization Interrupt on POWER9
Date: Wed, 13 Feb 2019 16:12:48 +1100 [thread overview]
Message-ID: <20190213051248.GR1884@umbus.fritz.box> (raw)
In-Reply-To: <20190128094625.4428-17-clg@kaod.org>
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On Mon, Jan 28, 2019 at 10:46:22AM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>
> This adds support for delivering that exception
>
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> target/ppc/cpu.h | 5 ++++-
> target/ppc/excp_helper.c | 17 ++++++++++++++++-
> target/ppc/translate_init.inc.c | 16 +++++++++++++++-
> 3 files changed, 35 insertions(+), 3 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index b69410ea2541..385d33bd37ff 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -160,8 +160,10 @@ enum {
> /* Server doorbell variants */
> POWERPC_EXCP_SDOOR = 99,
> POWERPC_EXCP_SDOOR_HV = 100,
> + /* ISA 3.00 additions */
> + POWERPC_EXCP_HVIRT = 101,
> /* EOL */
> - POWERPC_EXCP_NB = 101,
> + POWERPC_EXCP_NB = 102,
> /* QEMU exceptions: used internally during code translation */
> POWERPC_EXCP_STOP = 0x200, /* stop translation */
> POWERPC_EXCP_BRANCH = 0x201, /* branch instruction */
> @@ -2344,6 +2346,7 @@ enum {
> PPC_INTERRUPT_PERFM, /* Performance monitor interrupt */
> PPC_INTERRUPT_HMI, /* Hypervisor Maintainance interrupt */
> PPC_INTERRUPT_HDOORBELL, /* Hypervisor Doorbell interrupt */
> + PPC_INTERRUPT_HVIRT, /* Hypervisor virtualization interrupt */
> };
>
> /* Processor Compatibility mask (PCR) */
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 1a2f469a5fa2..d171a5eb6236 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -97,6 +97,9 @@ static int powerpc_reset_wakeup(CPUState *cs, CPUPPCState *env, int excp,
> case POWERPC_EXCP_HV_MAINT:
> *msr |= 0xaull << (63 - 45);
> break;
> + case POWERPC_EXCP_HVIRT:
> + *msr |= 0x9ull << (63 - 45);
> + break;
> default:
> cpu_abort(cs, "Unsupported exception %d in Power Save mode\n",
> excp);
> @@ -427,6 +430,7 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
> case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment exception */
> case POWERPC_EXCP_SDOOR_HV: /* Hypervisor Doorbell interrupt */
> case POWERPC_EXCP_HV_EMU:
> + case POWERPC_EXCP_HVIRT: /* Hypervisor virtualization */
> srr0 = SPR_HSRR0;
> srr1 = SPR_HSRR1;
> new_msr |= (target_ulong)MSR_HVB;
> @@ -809,7 +813,18 @@ static void ppc_hw_interrupt(CPUPPCState *env)
> return;
> }
> }
> - /* Extermal interrupt can ignore MSR:EE under some circumstances */
> +
> + /* Hypervisor virtualization interrupt */
> + if (env->pending_interrupts & (1 << PPC_INTERRUPT_HVIRT)) {
> + /* LPCR will be clear when not supported so this will work */
> + bool hvice = !!(env->spr[SPR_LPCR] & LPCR_HVICE);
> + if ((async_deliver || msr_hv == 0) && hvice) {
> + powerpc_excp(cpu, env->excp_model, POWERPC_EXCP_HVIRT);
> + return;
> + }
> + }
> +
> + /* External interrupt can ignore MSR:EE under some circumstances */
> if (env->pending_interrupts & (1 << PPC_INTERRUPT_EXT)) {
> bool lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);
> if (async_deliver || (env->has_hv_mode && msr_hv == 0 && !lpes0)) {
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index c1719c46a383..6ffa4a8fe0fa 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -3313,6 +3313,15 @@ static void init_excp_POWER8(CPUPPCState *env)
> #endif
> }
>
> +static void init_excp_POWER9(CPUPPCState *env)
> +{
> + init_excp_POWER8(env);
> +
> +#if !defined(CONFIG_USER_ONLY)
> + env->excp_vectors[POWERPC_EXCP_HVIRT] = 0x00000EA0;
> +#endif
> +}
> +
> #endif
>
> /*****************************************************************************/
> @@ -8783,7 +8792,7 @@ static void init_proc_POWER9(CPUPPCState *env)
> env->icache_line_size = 128;
>
> /* Allocate hardware IRQ controller */
> - init_excp_POWER8(env);
> + init_excp_POWER9(env);
> ppcPOWER7_irq_init(ppc_env_get_cpu(env));
> }
>
> @@ -8836,6 +8845,11 @@ static bool cpu_has_work_POWER9(CPUState *cs)
> (env->spr[SPR_LPCR] & LPCR_HDEE)) {
> return true;
> }
> + /* Hypervisor virtualization exception */
> + if ((env->pending_interrupts & (1u << PPC_INTERRUPT_HVIRT)) &&
> + (env->spr[SPR_LPCR] & LPCR_HVEE)) {
> + return true;
> + }
> if (env->pending_interrupts & (1u << PPC_INTERRUPT_RESET)) {
> return true;
> }
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2019-02-13 5:29 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-01-28 9:46 [Qemu-devel] [PATCH 00/19] ppc: support for the baremetal XIVE interrupt controller (POWER9) Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 01/19] ppc/xive: hardwire the Physical CAM line of the thread context Cédric Le Goater
2019-02-08 5:44 ` David Gibson
2019-02-08 7:28 ` Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 02/19] ppc: externalize ppc_get_vcpu_by_pir() Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 03/19] xive: extend the XiveRouter get_tctx() method with the page offset Cédric Le Goater
2019-02-12 4:34 ` David Gibson
2019-02-12 8:25 ` Cédric Le Goater
2019-02-12 20:31 ` Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 04/19] ppc/pnv: xive: export the TIMA memory accessors Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 05/19] ppc/pnv: add XIVE support Cédric Le Goater
2019-02-12 5:40 ` David Gibson
2019-02-19 7:31 ` Cédric Le Goater
2019-02-21 3:13 ` David Gibson
2019-02-21 8:32 ` Cédric Le Goater
2019-03-05 3:42 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 06/19] target/ppc: Remove some #if 0'ed code Cédric Le Goater
2019-02-12 5:41 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 07/19] target/ppc: Make special ORs match x86 pause and don't generate on mttcg Cédric Le Goater
2019-02-12 5:59 ` David Gibson
2019-02-13 0:03 ` Benjamin Herrenschmidt
2019-02-13 4:54 ` David Gibson
2019-02-13 8:07 ` Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 08/19] target/ppc: Fix nip on power management instructions Cédric Le Goater
2019-02-12 6:02 ` David Gibson
2019-02-13 0:04 ` Benjamin Herrenschmidt
2019-02-15 15:30 ` Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 09/19] target/ppc: Don't clobber MSR:EE on PM instructions Cédric Le Goater
2019-02-12 6:05 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 10/19] target/ppc: Fix support for "STOP light" states on POWER9 Cédric Le Goater
2019-02-13 5:05 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 11/19] target/ppc: Move "wakeup reset" code to a separate function Cédric Le Goater
2019-02-13 5:06 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 12/19] target/ppc: Disable ISA 2.06 PM instructions on POWER9 Cédric Le Goater
2019-02-13 5:07 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 13/19] target/ppc: Rename "in_pm_state" to "resume_as_sreset" Cédric Le Goater
2019-02-13 5:08 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 14/19] target/ppc: Add POWER9 exception model Cédric Le Goater
2019-02-13 5:10 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 15/19] target/ppc: Detect erroneous condition in interrupt delivery Cédric Le Goater
2019-02-13 5:11 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 16/19] target/ppc: Add Hypervisor Virtualization Interrupt on POWER9 Cédric Le Goater
2019-02-13 5:12 ` David Gibson [this message]
2019-01-28 9:46 ` [Qemu-devel] [PATCH 17/19] target/ppc: Add POWER9 external interrupt model Cédric Le Goater
2019-02-13 5:16 ` David Gibson
2019-02-15 15:43 ` Cédric Le Goater
2019-01-28 9:46 ` [Qemu-devel] [PATCH 18/19] ppc/xive: Make XIVE generate the proper interrupt types Cédric Le Goater
2019-02-13 5:17 ` David Gibson
2019-01-28 9:46 ` [Qemu-devel] [PATCH 19/19] target/ppc: Add support for LPCR:HEIC on POWER9 Cédric Le Goater
2019-02-13 5:18 ` David Gibson
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