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From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	Benjamin Herrenschmidt <benh@kernel.crashing.org>
Subject: Re: [Qemu-devel] [PATCH 17/19] target/ppc: Add POWER9 external interrupt model
Date: Wed, 13 Feb 2019 16:16:37 +1100	[thread overview]
Message-ID: <20190213051637.GS1884@umbus.fritz.box> (raw)
In-Reply-To: <20190128094625.4428-18-clg@kaod.org>

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On Mon, Jan 28, 2019 at 10:46:23AM +0100, Cédric Le Goater wrote:
> From: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> 
> Adds support for the Hypervisor directed interrupts in addition to the
> OS ones.
> 
> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  include/hw/ppc/ppc.h            |  2 ++
>  target/ppc/cpu-qom.h            |  2 ++
>  target/ppc/cpu.h                |  7 +++++++
>  hw/intc/xics.c                  |  1 +
>  hw/intc/xive.c                  |  2 +-
>  hw/ppc/ppc.c                    | 14 ++++++++++++++
>  target/ppc/translate_init.inc.c |  4 ++--
>  7 files changed, 29 insertions(+), 3 deletions(-)
> 
> diff --git a/include/hw/ppc/ppc.h b/include/hw/ppc/ppc.h
> index daaa04a22dbf..4bdcb8bacd4e 100644
> --- a/include/hw/ppc/ppc.h
> +++ b/include/hw/ppc/ppc.h
> @@ -74,6 +74,7 @@ static inline void ppc40x_irq_init(PowerPCCPU *cpu) {}
>  static inline void ppc6xx_irq_init(PowerPCCPU *cpu) {}
>  static inline void ppc970_irq_init(PowerPCCPU *cpu) {}
>  static inline void ppcPOWER7_irq_init(PowerPCCPU *cpu) {}
> +static inline void ppcPOWER9_irq_init(PowerPCCPU *cpu) {}
>  static inline void ppce500_irq_init(PowerPCCPU *cpu) {}
>  #else
>  void ppc40x_irq_init(PowerPCCPU *cpu);
> @@ -81,6 +82,7 @@ void ppce500_irq_init(PowerPCCPU *cpu);
>  void ppc6xx_irq_init(PowerPCCPU *cpu);
>  void ppc970_irq_init(PowerPCCPU *cpu);
>  void ppcPOWER7_irq_init(PowerPCCPU *cpu);
> +void ppcPOWER9_irq_init(PowerPCCPU *cpu);
>  #endif
>  
>  /* PPC machines for OpenBIOS */
> diff --git a/target/ppc/cpu-qom.h b/target/ppc/cpu-qom.h
> index 7ff8b2d68632..079fbb9d8718 100644
> --- a/target/ppc/cpu-qom.h
> +++ b/target/ppc/cpu-qom.h
> @@ -142,6 +142,8 @@ enum powerpc_input_t {
>      PPC_FLAGS_INPUT_970,
>      /* PowerPC POWER7 bus               */
>      PPC_FLAGS_INPUT_POWER7,
> +    /* PowerPC POWER9 bus               */
> +    PPC_FLAGS_INPUT_POWER9,
>      /* PowerPC 401 bus                  */
>      PPC_FLAGS_INPUT_401,
>      /* Freescale RCPU bus               */
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 385d33bd37ff..cc41ae6f3017 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2322,6 +2322,13 @@ enum {
>       * them */
>      POWER7_INPUT_NB,
>  };
> +
> +enum {
> +    /* POWER9 input pins */
> +    POWER9_INPUT_INT        = 0, /* Must match POWER7_INPUT_INT */

Rather than having this vital comment here...

> +    POWER9_INPUT_HINT       = 1,
> +    POWER9_INPUT_NB,
> +};
>  #endif
>  
>  /* Hardware exceptions definitions */
> diff --git a/hw/intc/xics.c b/hw/intc/xics.c
> index 16e8ffa2aaf7..1f786175168f 100644
> --- a/hw/intc/xics.c
> +++ b/hw/intc/xics.c
> @@ -342,6 +342,7 @@ static void icp_realize(DeviceState *dev, Error **errp)
>      env = &cpu->env;
>      switch (PPC_INPUT(env)) {
>      case PPC_FLAGS_INPUT_POWER7:
> +    case PPC_FLAGS_INPUT_POWER9: /* For SPAPR xics emulation */

.. you could just split the cases here.  It's a little more verbose,
but it's more robust.

>          icp->output = env->irq_inputs[POWER7_INPUT_INT];
>          break;
>  
> diff --git a/hw/intc/xive.c b/hw/intc/xive.c
> index 0e0e1dc9c1b7..119bb02d345d 100644
> --- a/hw/intc/xive.c
> +++ b/hw/intc/xive.c
> @@ -553,7 +553,7 @@ static void xive_tctx_realize(DeviceState *dev, Error **errp)
>  
>      env = &cpu->env;
>      switch (PPC_INPUT(env)) {
> -    case PPC_FLAGS_INPUT_POWER7:
> +    case PPC_FLAGS_INPUT_POWER9:

And here, of course.

>          tctx->output = env->irq_inputs[POWER7_INPUT_INT];
>          break;
>  
> diff --git a/hw/ppc/ppc.c b/hw/ppc/ppc.c
> index 608405f6f2ca..1a5e087c9b1e 100644
> --- a/hw/ppc/ppc.c
> +++ b/hw/ppc/ppc.c
> @@ -289,6 +289,12 @@ static void power7_set_irq(void *opaque, int pin, int level)
>                  __func__, level);
>          ppc_set_irq(cpu, PPC_INTERRUPT_EXT, level);
>          break;
> +    case POWER9_INPUT_HINT:

Having a POWER9 specific case in a function named for power7 is pretty
odd.  Best to split these as well, I think.

> +        /* Level sensitive - active high */
> +        LOG_IRQ("%s: set the external IRQ state to %d\n",
> +                __func__, level);
> +        ppc_set_irq(cpu, PPC_INTERRUPT_HVIRT, level);
> +        break;
>      default:
>          /* Unknown pin - do nothing */
>          LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
> @@ -308,6 +314,14 @@ void ppcPOWER7_irq_init(PowerPCCPU *cpu)
>      env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
>                                                    POWER7_INPUT_NB);
>  }
> +
> +void ppcPOWER9_irq_init(PowerPCCPU *cpu)
> +{
> +    CPUPPCState *env = &cpu->env;
> +
> +    env->irq_inputs = (void **)qemu_allocate_irqs(&power7_set_irq, cpu,
> +                                                  POWER9_INPUT_NB);
> +}
>  #endif /* defined(TARGET_PPC64) */
>  
>  /* PowerPC 40x internal IRQ controller */
> diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
> index 6ffa4a8fe0fa..7f25215f0192 100644
> --- a/target/ppc/translate_init.inc.c
> +++ b/target/ppc/translate_init.inc.c
> @@ -8793,7 +8793,7 @@ static void init_proc_POWER9(CPUPPCState *env)
>  
>      /* Allocate hardware IRQ controller */
>      init_excp_POWER9(env);
> -    ppcPOWER7_irq_init(ppc_env_get_cpu(env));
> +    ppcPOWER9_irq_init(ppc_env_get_cpu(env));
>  }
>  
>  static bool ppc_pvr_match_power9(PowerPCCPUClass *pcc, uint32_t pvr)
> @@ -8920,7 +8920,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data)
>      pcc->radix_page_info = &POWER9_radix_page_info;
>  #endif
>      pcc->excp_model = POWERPC_EXCP_POWER9;
> -    pcc->bus_model = PPC_FLAGS_INPUT_POWER7;
> +    pcc->bus_model = PPC_FLAGS_INPUT_POWER9;
>      pcc->bfd_mach = bfd_mach_ppc64;
>      pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE |
>                   POWERPC_FLAG_BE | POWERPC_FLAG_PMM |

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2019-02-13  5:29 UTC|newest]

Thread overview: 50+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-01-28  9:46 [Qemu-devel] [PATCH 00/19] ppc: support for the baremetal XIVE interrupt controller (POWER9) Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 01/19] ppc/xive: hardwire the Physical CAM line of the thread context Cédric Le Goater
2019-02-08  5:44   ` David Gibson
2019-02-08  7:28     ` Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 02/19] ppc: externalize ppc_get_vcpu_by_pir() Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 03/19] xive: extend the XiveRouter get_tctx() method with the page offset Cédric Le Goater
2019-02-12  4:34   ` David Gibson
2019-02-12  8:25     ` Cédric Le Goater
2019-02-12 20:31       ` Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 04/19] ppc/pnv: xive: export the TIMA memory accessors Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 05/19] ppc/pnv: add XIVE support Cédric Le Goater
2019-02-12  5:40   ` David Gibson
2019-02-19  7:31     ` Cédric Le Goater
2019-02-21  3:13       ` David Gibson
2019-02-21  8:32         ` Cédric Le Goater
2019-03-05  3:42           ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 06/19] target/ppc: Remove some #if 0'ed code Cédric Le Goater
2019-02-12  5:41   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 07/19] target/ppc: Make special ORs match x86 pause and don't generate on mttcg Cédric Le Goater
2019-02-12  5:59   ` David Gibson
2019-02-13  0:03     ` Benjamin Herrenschmidt
2019-02-13  4:54       ` David Gibson
2019-02-13  8:07         ` Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 08/19] target/ppc: Fix nip on power management instructions Cédric Le Goater
2019-02-12  6:02   ` David Gibson
2019-02-13  0:04     ` Benjamin Herrenschmidt
2019-02-15 15:30       ` Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 09/19] target/ppc: Don't clobber MSR:EE on PM instructions Cédric Le Goater
2019-02-12  6:05   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 10/19] target/ppc: Fix support for "STOP light" states on POWER9 Cédric Le Goater
2019-02-13  5:05   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 11/19] target/ppc: Move "wakeup reset" code to a separate function Cédric Le Goater
2019-02-13  5:06   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 12/19] target/ppc: Disable ISA 2.06 PM instructions on POWER9 Cédric Le Goater
2019-02-13  5:07   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 13/19] target/ppc: Rename "in_pm_state" to "resume_as_sreset" Cédric Le Goater
2019-02-13  5:08   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 14/19] target/ppc: Add POWER9 exception model Cédric Le Goater
2019-02-13  5:10   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 15/19] target/ppc: Detect erroneous condition in interrupt delivery Cédric Le Goater
2019-02-13  5:11   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 16/19] target/ppc: Add Hypervisor Virtualization Interrupt on POWER9 Cédric Le Goater
2019-02-13  5:12   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 17/19] target/ppc: Add POWER9 external interrupt model Cédric Le Goater
2019-02-13  5:16   ` David Gibson [this message]
2019-02-15 15:43     ` Cédric Le Goater
2019-01-28  9:46 ` [Qemu-devel] [PATCH 18/19] ppc/xive: Make XIVE generate the proper interrupt types Cédric Le Goater
2019-02-13  5:17   ` David Gibson
2019-01-28  9:46 ` [Qemu-devel] [PATCH 19/19] target/ppc: Add support for LPCR:HEIC on POWER9 Cédric Le Goater
2019-02-13  5:18   ` David Gibson

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