From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:60468) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gu89f-000721-9r for qemu-devel@nongnu.org; Wed, 13 Feb 2019 22:57:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gu7wL-00077Y-Mc for qemu-devel@nongnu.org; Wed, 13 Feb 2019 22:43:59 -0500 Received: from mail-pf1-x443.google.com ([2607:f8b0:4864:20::443]:40950) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gu7wL-00072l-Bj for qemu-devel@nongnu.org; Wed, 13 Feb 2019 22:43:57 -0500 Received: by mail-pf1-x443.google.com with SMTP id h1so2340086pfo.7 for ; Wed, 13 Feb 2019 19:43:54 -0800 (PST) From: Richard Henderson Date: Wed, 13 Feb 2019 19:43:45 -0800 Message-Id: <20190214034345.24722-5-richard.henderson@linaro.org> In-Reply-To: <20190214034345.24722-1-richard.henderson@linaro.org> References: <20190214034345.24722-1-richard.henderson@linaro.org> Subject: [Qemu-devel] [PATCH 4/4] target/arm: Enable ARMv8.2-FHM for -cpu max List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Signed-off-by: Richard Henderson --- target/arm/cpu.c | 1 + target/arm/cpu64.c | 2 ++ 2 files changed, 3 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index edf6e0e1f1..f4aa6202f5 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2002,6 +2002,7 @@ static void arm_max_initfn(Object *obj) t = cpu->isar.id_isar6; t = FIELD_DP32(t, ID_ISAR6, DP, 1); + t = FIELD_DP32(t, ID_ISAR6, FHM, 1); cpu->isar.id_isar6 = t; t = cpu->id_mmfr4; diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c index eff0f164dd..bffce337a4 100644 --- a/target/arm/cpu64.c +++ b/target/arm/cpu64.c @@ -308,6 +308,7 @@ static void aarch64_max_initfn(Object *obj) t = FIELD_DP64(t, ID_AA64ISAR0, SM3, 1); t = FIELD_DP64(t, ID_AA64ISAR0, SM4, 1); t = FIELD_DP64(t, ID_AA64ISAR0, DP, 1); + t = FIELD_DP64(t, ID_AA64ISAR0, FHM, 1); cpu->isar.id_aa64isar0 = t; t = cpu->isar.id_aa64isar1; @@ -345,6 +346,7 @@ static void aarch64_max_initfn(Object *obj) u = cpu->isar.id_isar6; u = FIELD_DP32(u, ID_ISAR6, DP, 1); + u = FIELD_DP32(u, ID_ISAR6, FHM, 1); cpu->isar.id_isar6 = u; /* -- 2.17.2