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From: Peter Maydell <peter.maydell@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PULL 18/27] target/arm: Use tcg integer min/max primitives for neon
Date: Thu, 14 Feb 2019 19:05:54 +0000	[thread overview]
Message-ID: <20190214190603.25030-19-peter.maydell@linaro.org> (raw)
In-Reply-To: <20190214190603.25030-1-peter.maydell@linaro.org>

From: Richard Henderson <richard.henderson@linaro.org>

The 32-bit PMIN/PMAX has been decomposed to scalars,
and so can be trivially expanded inline.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20190209033847.9014-5-richard.henderson@linaro.org
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
 target/arm/translate.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/target/arm/translate.c b/target/arm/translate.c
index 61760dab917..103b4f1821a 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -4760,10 +4760,10 @@ static inline void gen_neon_rsb(int size, TCGv_i32 t0, TCGv_i32 t1)
 }
 
 /* 32-bit pairwise ops end up the same as the elementwise versions.  */
-#define gen_helper_neon_pmax_s32  gen_helper_neon_max_s32
-#define gen_helper_neon_pmax_u32  gen_helper_neon_max_u32
-#define gen_helper_neon_pmin_s32  gen_helper_neon_min_s32
-#define gen_helper_neon_pmin_u32  gen_helper_neon_min_u32
+#define gen_helper_neon_pmax_s32  tcg_gen_smax_i32
+#define gen_helper_neon_pmax_u32  tcg_gen_umax_i32
+#define gen_helper_neon_pmin_s32  tcg_gen_smin_i32
+#define gen_helper_neon_pmin_u32  tcg_gen_umin_i32
 
 #define GEN_NEON_INTEGER_OP_ENV(name) do { \
     switch ((size << 1) | u) { \
-- 
2.20.1

  parent reply	other threads:[~2019-02-14 19:06 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-02-14 19:05 [Qemu-devel] [PULL 00/27] target-arm queue Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 01/27] target/arm: Fix CRn to be 14 for PMEVTYPER/PMEVCNTR Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 02/27] target/arm: Implement HACR_EL2 Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 03/27] target/arm: Fix int128_make128 lo, hi order in paired_cmpxchg64_be Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 04/27] target/arm: Force result size into dp after operation Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 05/27] target/arm: Restructure disas_fp_int_conv Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 06/27] target/arm: relax permission checks for HWCAP_CPUID registers Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 07/27] target/arm: expose CPUID registers to userspace Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 08/27] target/arm: expose MPIDR_EL1 " Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 09/27] target/arm: expose remaining CPUID registers as RAZ Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 10/27] linux-user/elfload: enable HWCAP_CPUID for AArch64 Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 11/27] arm: Allow system registers for KVM guests to be changed by QEMU code Peter Maydell
2019-02-21 14:20   ` Auger Eric
2019-02-21 14:23     ` Peter Maydell
2019-02-21 14:26     ` Peter Maydell
2019-02-21 14:55       ` Auger Eric
2019-03-08 15:53         ` Peter Maydell
2019-03-08 16:54           ` Auger Eric
2019-02-21 14:42     ` Alex Bennée
2019-02-26 16:53     ` Peter Maydell
2019-03-11 13:26     ` Peter Maydell
2019-03-11 14:54       ` Auger Eric
2019-03-11 14:55         ` Peter Maydell
2019-03-11 15:09           ` Auger Eric
2019-03-11 16:07             ` Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 12/27] MAINTAINERS: Remove Peter Crosthwaite from various entries Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 13/27] hw/intc/armv7m_nvic: Allow byte accesses to SHPR1 Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 14/27] hw/arm/armsse: Fix miswiring of expansion IRQs Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 15/27] target/arm: Rely on optimization within tcg_gen_gvec_or Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 16/27] target/arm: Use vector minmax expanders for aarch64 Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 17/27] target/arm: Use vector minmax expanders for aarch32 Peter Maydell
2019-02-14 19:05 ` Peter Maydell [this message]
2019-02-14 19:05 ` [Qemu-devel] [PULL 19/27] target/arm: Remove neon min/max helpers Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 20/27] target/arm: Fix vfp_gdb_get/set_reg vs FPSCR Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 21/27] target/arm: Fix arm_cpu_dump_state " Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 22/27] target/arm: Split out flags setting from vfp compares Peter Maydell
2019-02-14 19:05 ` [Qemu-devel] [PULL 23/27] target/arm: Fix set of bits kept in xregs[ARM_VFP_FPSCR] Peter Maydell
2019-02-14 19:06 ` [Qemu-devel] [PULL 24/27] target/arm: Split out FPSCR.QC to a vector field Peter Maydell
2019-02-14 19:06 ` [Qemu-devel] [PULL 25/27] target/arm: Use vector operations for saturation Peter Maydell
2019-02-14 19:06 ` [Qemu-devel] [PULL 26/27] target/arm: Add missing clear_tail calls Peter Maydell
2019-02-14 19:06 ` [Qemu-devel] [PULL 27/27] gdbstub: Send a reply to the vKill packet Peter Maydell
2019-02-14 19:56 ` [Qemu-devel] [PULL 00/27] target-arm queue no-reply
2019-02-14 20:30 ` no-reply
2019-02-14 20:57 ` no-reply
2019-02-14 21:24 ` no-reply
2019-02-14 21:51 ` no-reply
2019-02-14 22:18 ` no-reply
2019-02-14 23:39 ` no-reply
2019-02-15  0:07 ` no-reply
2019-02-15  0:11 ` no-reply
2019-02-15  0:34 ` no-reply
2019-02-15  0:38 ` no-reply
2019-02-15  1:01 ` no-reply
2019-02-15  1:20 ` no-reply
2019-02-15  1:24 ` no-reply
2019-02-15  1:28 ` no-reply
2019-02-15  1:32 ` no-reply
2019-02-15  1:48 ` no-reply
2019-02-15  1:56 ` no-reply
2019-02-15  2:15 ` no-reply
2019-02-15  2:19 ` no-reply
2019-02-15  2:24 ` no-reply
2019-02-15  2:43 ` no-reply

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