[Qemu-devel] [PATCH v4 0/8] target/arm: Implement ARMv8.3-JSConv & ARMv8.2-FHM

[Richard Henderson <richard.henderson@linaro.org>]

Changes since v3:

Rebased on master, and combined the JSConv and FHM patch sets.
There were a number of patch conflicts which needed fixing up.

Changes since v2:

Patch 2 splits out vfp_helper.c, which I wrote for something else.
But while rebasing it occured to me that helper_vjcvt is better placed
in vfp_helper.c than op_helper.c, so why not include it here and now.

Patch 3 corresponds to the v2 patch 1, but totally rewritten.  What
I missed the first time around is that register Sn is encoded differenly
than Dn, so merely setting dp = 0 doesn't help because we've already
decoded the register number incorrectly.  Therefore, replace some really
ugly if conditions and set some variables as appropriate.

Patch 4 is adjusted to match the change in decode from patch 2, and
putting the aa32 flags in the right place.


r~


Richard Henderson (8):
  target/arm: Restructure disas_fp_int_conv
  target/arm: Split out vfp_helper.c
  target/arm: Rearrange Floating-point data-processing (2 regs)
  target/arm: Implement ARMv8.3-JSConv
  target/arm: Add helpers for FMLAL
  target/arm: Implement FMLAL and FMLSL for aarch64
  target/arm: Implement VFMAL and VFMSL for aarch32
  target/arm: Enable ARMv8.2-FHM for -cpu max

 target/arm/cpu.h           |   20 +
 target/arm/helper.h        |    8 +
 target/arm/cpu.c           |    2 +
 target/arm/cpu64.c         |    4 +
 target/arm/helper.c        | 1062 --------------------------------
 target/arm/translate-a64.c |  170 ++++--
 target/arm/translate.c     |  340 ++++++-----
 target/arm/vec_helper.c    |  114 ++++
 target/arm/vfp_helper.c    | 1176 ++++++++++++++++++++++++++++++++++++
 target/arm/Makefile.objs   |    2 +-
 10 files changed, 1644 insertions(+), 1254 deletions(-)
 create mode 100644 target/arm/vfp_helper.c

-- 
2.17.2