From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:32804) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gvwdL-0003rJ-9t for qemu-devel@nongnu.org; Mon, 18 Feb 2019 23:03:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gvwdF-0002PB-MI for qemu-devel@nongnu.org; Mon, 18 Feb 2019 23:03:49 -0500 Date: Tue, 19 Feb 2019 14:09:48 +1100 From: David Gibson Message-ID: <20190219030948.GP9345@umbus.fritz.box> References: <20190215170029.15641-1-clg@kaod.org> <20190215170029.15641-3-clg@kaod.org> <20190218064709.GD9345@umbus.fritz.box> <8dbdf821-503c-1811-c2ed-90efb8b7cc1b@redhat.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="1BKOZKwX7DAU5odC" Content-Disposition: inline In-Reply-To: <8dbdf821-503c-1811-c2ed-90efb8b7cc1b@redhat.com> Subject: Re: [Qemu-devel] [PATCH 02/12] target/ppci/mmu: Use LPCR:HR to chose radix vs. hash translation List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Philippe =?iso-8859-1?Q?Mathieu-Daud=E9?= Cc: =?iso-8859-1?Q?C=E9dric?= Le Goater , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Suraj Jitindar Singh --1BKOZKwX7DAU5odC Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Mon, Feb 18, 2019 at 10:20:43PM +0100, Philippe Mathieu-Daud=E9 wrote: > On 2/18/19 7:47 AM, David Gibson wrote: > > On Fri, Feb 15, 2019 at 06:00:19PM +0100, C=E9dric Le Goater wrote: > >> From: Benjamin Herrenschmidt > >> > >> Now that LPCR:HR is set properly for SPAPR, use it for deciding > >> the translation type, which also works for bare metal >=20 > "ppci" -> "ppc" in patch title. Fixed up inline. >=20 > >> > >> Signed-off-by: Benjamin Herrenschmidt > >> Signed-off-by: C=E9dric Le Goater > >=20 > > Reviewed-by: David Gibson > >=20 > >> --- > >> target/ppc/mmu-book3s-v3.h | 14 +++++++++----- > >> target/ppc/mmu-book3s-v3.c | 11 ++++++++++- > >> target/ppc/mmu_helper.c | 9 ++------- > >> 3 files changed, 21 insertions(+), 13 deletions(-) > >> > >> diff --git a/target/ppc/mmu-book3s-v3.h b/target/ppc/mmu-book3s-v3.h > >> index fdf80987d7b2..41b77158622a 100644 > >> --- a/target/ppc/mmu-book3s-v3.h > >> +++ b/target/ppc/mmu-book3s-v3.h > >> @@ -43,14 +43,18 @@ static inline bool ppc64_use_proc_tbl(PowerPCCPU *= cpu) > >> return !!(cpu->env.spr[SPR_LPCR] & LPCR_UPRT); > >> } > >> =20 > >> -static inline bool ppc64_radix_guest(PowerPCCPU *cpu) > >> +/* > >> + * The LPCR:HR bit is a shortcut that avoids having to > >> + * dig out the partition table in the fast path. This is > >> + * also how the HW uses it. > >> + */ > >> +static inline bool ppc64_v3_radix(PowerPCCPU *cpu) > >> { > >> - PPCVirtualHypervisorClass *vhc =3D > >> - PPC_VIRTUAL_HYPERVISOR_GET_CLASS(cpu->vhyp); > >> - > >> - return !!(vhc->get_patbe(cpu->vhyp) & PATBE1_GR); > >> + return !!(cpu->env.spr[SPR_LPCR] & LPCR_HR); > >> } > >> =20 > >> +hwaddr ppc64_v3_get_phys_page_debug(PowerPCCPU *cpu, vaddr eaddr); > >> + > >> int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, > >> int mmu_idx); > >> =20 > >> diff --git a/target/ppc/mmu-book3s-v3.c b/target/ppc/mmu-book3s-v3.c > >> index b60df4408f3b..a174e7efc57c 100644 > >> --- a/target/ppc/mmu-book3s-v3.c > >> +++ b/target/ppc/mmu-book3s-v3.c > >> @@ -26,9 +26,18 @@ > >> int ppc64_v3_handle_mmu_fault(PowerPCCPU *cpu, vaddr eaddr, int rwx, > >> int mmu_idx) > >> { > >> - if (ppc64_radix_guest(cpu)) { /* Guest uses radix */ > >> + if (ppc64_v3_radix(cpu)) { /* Guest uses radix */ > >> return ppc_radix64_handle_mmu_fault(cpu, eaddr, rwx, mmu_idx); > >> } else { /* Guest uses hash */ > >> return ppc_hash64_handle_mmu_fault(cpu, eaddr, rwx, mmu_idx); > >> } > >> } > >> + > >> +hwaddr ppc64_v3_get_phys_page_debug(PowerPCCPU *cpu, vaddr eaddr) > >> +{ > >> + if (ppc64_v3_radix(cpu)) { > >> + return ppc_radix64_get_phys_page_debug(cpu, eaddr); > >> + } else { > >> + return ppc_hash64_get_phys_page_debug(cpu, eaddr); > >> + } > >> +} > >> diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c > >> index cefed34da4f2..ae81ee18ae95 100644 > >> --- a/target/ppc/mmu_helper.c > >> +++ b/target/ppc/mmu_helper.c > >> @@ -1342,7 +1342,7 @@ void dump_mmu(FILE *f, fprintf_function cpu_fpri= ntf, CPUPPCState *env) > >> dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); > >> break; > >> case POWERPC_MMU_3_00: > >> - if (ppc64_radix_guest(ppc_env_get_cpu(env))) { > >> + if (ppc64_v3_radix(ppc_env_get_cpu(env))) { > >> /* TODO - Unsupported */ > >> } else { > >> dump_slb(f, cpu_fprintf, ppc_env_get_cpu(env)); > >> @@ -1497,12 +1497,7 @@ hwaddr ppc_cpu_get_phys_page_debug(CPUState *cs= , vaddr addr) > >> case POWERPC_MMU_2_07: > >> return ppc_hash64_get_phys_page_debug(cpu, addr); > >> case POWERPC_MMU_3_00: > >> - if (ppc64_radix_guest(ppc_env_get_cpu(env))) { > >> - return ppc_radix64_get_phys_page_debug(cpu, addr); > >> - } else { > >> - return ppc_hash64_get_phys_page_debug(cpu, addr); > >> - } > >> - break; > >> + return ppc64_v3_get_phys_page_debug(cpu, addr); > >> #endif > >> =20 > >> case POWERPC_MMU_32B: > >=20 >=20 --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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