From: David Gibson <david@gibson.dropbear.id.au>
To: Greg Kurz <groug@kaod.org>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
qemu-s390x@nongnu.org, "Alexey Kardashevskiy" <aik@ozlabs.ru>,
"Cédric Le Goater" <clg@kaod.org>,
"Michael Roth" <mdroth@linux.vnet.ibm.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Marcel Apfelbaum" <marcel@redhat.com>,
"Eduardo Habkost" <ehabkost@redhat.com>,
"David Hildenbrand" <david@redhat.com>,
"Cornelia Huck" <cohuck@redhat.com>,
"Gerd Hoffmann" <kraxel@redhat.com>,
"Dmitry Fleytman" <dmitry.fleytman@gmail.com>,
"Thomas Huth" <thuth@redhat.com>
Subject: Re: [Qemu-devel] [PATCH v5 06/17] xics: Write source state to KVM at claim time
Date: Wed, 20 Feb 2019 14:24:28 +1100 [thread overview]
Message-ID: <20190220032428.GF9345@umbus.fritz.box> (raw)
In-Reply-To: <155059668360.1466090.5969630516627776426.stgit@bahia.lab.toulouse-stg.fr.ibm.com>
[-- Attachment #1: Type: text/plain, Size: 5243 bytes --]
On Tue, Feb 19, 2019 at 06:18:03PM +0100, Greg Kurz wrote:
> The pseries machine only uses LSIs to support legacy PCI devices. Every
> PHB claims 4 LSIs at realize time. When using in-kernel XICS (or upcoming
> in-kernel XIVE), QEMU synchronizes the state of all irqs, including these
> LSIs, later on at machine reset.
>
> In order to support PHB hotplug, we need a way to tell KVM about the LSIs
> that doesn't require a machine reset. An easy way to do that is to always
> inform KVM when an interrupt is claimed, which really isn't a performance
> path.
>
> Signed-off-by: Greg Kurz <groug@kaod.org>
Applied, thanks.
> ---
> hw/intc/xics.c | 4 +++
> hw/intc/xics_kvm.c | 74 ++++++++++++++++++++++++++++---------------------
> include/hw/ppc/xics.h | 1 +
> 3 files changed, 48 insertions(+), 31 deletions(-)
>
> diff --git a/hw/intc/xics.c b/hw/intc/xics.c
> index 767fdeb82900..af7dc709abab 100644
> --- a/hw/intc/xics.c
> +++ b/hw/intc/xics.c
> @@ -758,6 +758,10 @@ void ics_set_irq_type(ICSState *ics, int srcno, bool lsi)
>
> ics->irqs[srcno].flags |=
> lsi ? XICS_FLAGS_IRQ_LSI : XICS_FLAGS_IRQ_MSI;
> +
> + if (kvm_irqchip_in_kernel()) {
> + ics_set_kvm_state_one(ics, srcno);
> + }
> }
>
> static void xics_register_types(void)
> diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c
> index a00d0a7962e1..c6e1b630a404 100644
> --- a/hw/intc/xics_kvm.c
> +++ b/hw/intc/xics_kvm.c
> @@ -213,45 +213,57 @@ void ics_synchronize_state(ICSState *ics)
> ics_get_kvm_state(ics);
> }
>
> -int ics_set_kvm_state(ICSState *ics)
> +int ics_set_kvm_state_one(ICSState *ics, int srcno)
> {
> uint64_t state;
> - int i;
> Error *local_err = NULL;
> + ICSIRQState *irq = &ics->irqs[srcno];
> + int ret;
>
> - for (i = 0; i < ics->nr_irqs; i++) {
> - ICSIRQState *irq = &ics->irqs[i];
> - int ret;
> -
> - state = irq->server;
> - state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
> - << KVM_XICS_PRIORITY_SHIFT;
> - if (irq->priority != irq->saved_priority) {
> - assert(irq->priority == 0xff);
> - state |= KVM_XICS_MASKED;
> - }
> + state = irq->server;
> + state |= (uint64_t)(irq->saved_priority & KVM_XICS_PRIORITY_MASK)
> + << KVM_XICS_PRIORITY_SHIFT;
> + if (irq->priority != irq->saved_priority) {
> + assert(irq->priority == 0xff);
> + state |= KVM_XICS_MASKED;
> + }
>
> - if (ics->irqs[i].flags & XICS_FLAGS_IRQ_LSI) {
> - state |= KVM_XICS_LEVEL_SENSITIVE;
> - if (irq->status & XICS_STATUS_ASSERTED) {
> - state |= KVM_XICS_PENDING;
> - }
> - } else {
> - if (irq->status & XICS_STATUS_MASKED_PENDING) {
> - state |= KVM_XICS_PENDING;
> - }
> + if (irq->flags & XICS_FLAGS_IRQ_LSI) {
> + state |= KVM_XICS_LEVEL_SENSITIVE;
> + if (irq->status & XICS_STATUS_ASSERTED) {
> + state |= KVM_XICS_PENDING;
> }
> - if (irq->status & XICS_STATUS_PRESENTED) {
> - state |= KVM_XICS_PRESENTED;
> - }
> - if (irq->status & XICS_STATUS_QUEUED) {
> - state |= KVM_XICS_QUEUED;
> + } else {
> + if (irq->status & XICS_STATUS_MASKED_PENDING) {
> + state |= KVM_XICS_PENDING;
> }
> + }
> + if (irq->status & XICS_STATUS_PRESENTED) {
> + state |= KVM_XICS_PRESENTED;
> + }
> + if (irq->status & XICS_STATUS_QUEUED) {
> + state |= KVM_XICS_QUEUED;
> + }
> +
> + ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
> + srcno + ics->offset, &state, true, &local_err);
> + if (local_err) {
> + error_report_err(local_err);
> + return ret;
> + }
> +
> + return 0;
> +}
> +
> +int ics_set_kvm_state(ICSState *ics)
> +{
> + int i;
> +
> + for (i = 0; i < ics->nr_irqs; i++) {
> + int ret;
>
> - ret = kvm_device_access(kernel_xics_fd, KVM_DEV_XICS_GRP_SOURCES,
> - i + ics->offset, &state, true, &local_err);
> - if (local_err) {
> - error_report_err(local_err);
> + ret = ics_set_kvm_state_one(ics, i);
> + if (ret) {
> return ret;
> }
> }
> diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h
> index d36bbe11ee2e..eb65ad7e43b7 100644
> --- a/include/hw/ppc/xics.h
> +++ b/include/hw/ppc/xics.h
> @@ -195,6 +195,7 @@ void icp_synchronize_state(ICPState *icp);
> void icp_kvm_realize(DeviceState *dev, Error **errp);
>
> void ics_get_kvm_state(ICSState *ics);
> +int ics_set_kvm_state_one(ICSState *ics, int srcno);
> int ics_set_kvm_state(ICSState *ics);
> void ics_synchronize_state(ICSState *ics);
> void ics_kvm_set_irq(ICSState *ics, int srcno, int val);
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 833 bytes --]
next prev parent reply other threads:[~2019-02-20 3:31 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-19 17:17 [Qemu-devel] [PATCH v5 00/17] spapr: Add support for PHB hotplug Greg Kurz
2019-02-19 17:17 ` [Qemu-devel] [PATCH v5 01/17] spapr_drc: Allow FDT fragment to be added later Greg Kurz
2019-02-19 17:17 ` [Qemu-devel] [PATCH v5 02/17] spapr: Generate FDT fragment for LMBs at configure connector time Greg Kurz
2019-02-19 17:17 ` [Qemu-devel] [PATCH v5 03/17] spapr: Generate FDT fragment for CPUs " Greg Kurz
2019-02-19 17:17 ` [Qemu-devel] [PATCH v5 04/17] spapr/pci: Generate FDT fragment " Greg Kurz
2019-02-19 17:17 ` [Qemu-devel] [PATCH v5 05/17] spapr/drc: Drop spapr_drc_attach() fdt argument Greg Kurz
2019-02-20 3:22 ` David Gibson
2019-02-20 9:01 ` Greg Kurz
2019-02-20 9:57 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 06/17] xics: Write source state to KVM at claim time Greg Kurz
2019-02-19 17:53 ` Cédric Le Goater
2019-02-20 3:24 ` David Gibson [this message]
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 07/17] spapr: Expose the name of the interrupt controller node Greg Kurz
2019-02-20 3:24 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 08/17] spapr_irq: Expose the phandle of the interrupt controller Greg Kurz
2019-02-20 3:25 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 09/17] spapr_pci: add PHB unrealize Greg Kurz
2019-02-20 3:26 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 10/17] spapr: create DR connectors for PHBs Greg Kurz
2019-02-20 3:27 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 11/17] spapr: populate PHB DRC entries for root DT node Greg Kurz
2019-02-20 3:27 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 12/17] spapr_events: add support for phb hotplug events Greg Kurz
2019-02-20 3:28 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 13/17] spapr_pci: provide node start offset via spapr_populate_pci_dt() Greg Kurz
2019-02-20 3:28 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 14/17] spapr_pci: add ibm, my-drc-index property for PHB hotplug Greg Kurz
2019-02-20 3:29 ` David Gibson
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 15/17] spapr: add hotplug hooks " Greg Kurz
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 16/17] spapr: enable PHB hotplug for default pseries machine type Greg Kurz
2019-02-19 17:18 ` [Qemu-devel] [PATCH v5 17/17] tests/device-plug: Add PHB unplug request test for spapr Greg Kurz
2019-02-20 3:30 ` [Qemu-devel] [PATCH v5 00/17] spapr: Add support for PHB hotplug David Gibson
2019-02-20 11:04 ` [Qemu-devel] [Qemu-ppc] " Greg Kurz
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190220032428.GF9345@umbus.fritz.box \
--to=david@gibson.dropbear.id.au \
--cc=aik@ozlabs.ru \
--cc=clg@kaod.org \
--cc=cohuck@redhat.com \
--cc=david@redhat.com \
--cc=dmitry.fleytman@gmail.com \
--cc=ehabkost@redhat.com \
--cc=groug@kaod.org \
--cc=kraxel@redhat.com \
--cc=marcel@redhat.com \
--cc=mdroth@linux.vnet.ibm.com \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=qemu-ppc@nongnu.org \
--cc=qemu-s390x@nongnu.org \
--cc=thuth@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).