From: Sven Schnelle <svens@stackframe.org>
To: Richard Henderson <rth@twiddle.net>
Cc: qemu-devel@nongnu.org, deller@gmx.de
Subject: Re: [Qemu-devel] [PATCH v2] hw/hppa/dino: mask out lower 2 bits of PCI config addr
Date: Thu, 21 Feb 2019 15:22:46 +0100 [thread overview]
Message-ID: <20190221142246.GA19123@t470p.stackframe.org> (raw)
In-Reply-To: <b1fa8a79-c7dc-0e30-b8e3-a11657667143@twiddle.net>
Hi Richard,
On Wed, Feb 20, 2019 at 10:57:50AM -0800, Richard Henderson wrote:
> Can you re-test with the following?
>
> If the stores are all aligned, then the reads to not need to re-align.
> Also, partial writes to the config register don't make much sense.
> Over in hw/pci/pci_host.c, we check addr == 0 && len == 4, which is a
> very old fashioned way to do the .valid thing.
With your proposed change it works as well - should i send a v2 or will you
take care of updating the patch?
Thanks
Sven
next prev parent reply other threads:[~2019-02-21 14:23 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-18 18:33 [Qemu-devel] [PATCH v2] hw/hppa/dino: mask out lower 2 bits of PCI config addr Sven Schnelle
2019-02-20 18:57 ` Richard Henderson
2019-02-21 14:22 ` Sven Schnelle [this message]
2019-02-21 17:24 ` Richard Henderson
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