From: David Hildenbrand <david@redhat.com>
To: qemu-devel@nongnu.org
Cc: qemu-s390x@nongnu.org, Thomas Huth <thuth@redhat.com>,
Halil Pasic <pasic@linux.ibm.com>,
Christian Borntraeger <borntraeger@de.ibm.com>,
Janosch Frank <frankja@linux.ibm.com>,
Cornelia Huck <cohuck@redhat.com>,
Richard Henderson <rth@twiddle.net>,
David Hildenbrand <david@redhat.com>
Subject: [Qemu-devel] [PATCH v1 1/3] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS
Date: Fri, 22 Feb 2019 09:11:51 +0100 [thread overview]
Message-ID: <20190222081153.14206-2-david@redhat.com> (raw)
In-Reply-To: <20190222081153.14206-1-david@redhat.com>
As we will support vector instructions soon, and vector registers are
stored in 64bit host chunks, let's use cpu_to_be64. Same applies to the
guarded storage control block.
Signed-off-by: David Hildenbrand <david@redhat.com>
---
target/s390x/helper.c | 31 +++++++++++++++++++++----------
1 file changed, 21 insertions(+), 10 deletions(-)
diff --git a/target/s390x/helper.c b/target/s390x/helper.c
index 3d74836a83..f3fcf96482 100644
--- a/target/s390x/helper.c
+++ b/target/s390x/helper.c
@@ -272,32 +272,43 @@ int s390_store_status(S390CPU *cpu, hwaddr addr, bool store_arch)
return 0;
}
-#define ADTL_GS_OFFSET 1024 /* offset of GS data in adtl save area */
+typedef struct SigpAdtlSaveArea {
+ uint64_t vregs[32][2]; /* 0x0000 */
+ uint8_t pad_0x0200[0x0400 - 0x0200]; /* 0x0200 */
+ uint64_t gscb[4]; /* 0x0400 */
+ uint8_t pad_0x0420[0x1000 - 0x0420]; /* 0x0420 */
+} SigpAdtlSaveArea;
+QEMU_BUILD_BUG_ON(sizeof(SigpAdtlSaveArea) != 4096);
+
#define ADTL_GS_MIN_SIZE 2048 /* minimal size of adtl save area for GS */
int s390_store_adtl_status(S390CPU *cpu, hwaddr addr, hwaddr len)
{
+ SigpAdtlSaveArea *sa;
hwaddr save = len;
- void *mem;
+ int i;
- mem = cpu_physical_memory_map(addr, &save, 1);
- if (!mem) {
+ sa = cpu_physical_memory_map(addr, &save, 1);
+ if (!sa) {
return -EFAULT;
}
if (save != len) {
- cpu_physical_memory_unmap(mem, len, 1, 0);
+ cpu_physical_memory_unmap(sa, len, 1, 0);
return -EFAULT;
}
- /* FIXME: as soon as TCG supports these features, convert cpu->be */
if (s390_has_feat(S390_FEAT_VECTOR)) {
- memcpy(mem, &cpu->env.vregs, 512);
+ for (i = 0; i < 32; i++) {
+ sa->vregs[i][0] = cpu_to_be64(cpu->env.vregs[i][0].ll);
+ sa->vregs[i][1] = cpu_to_be64(cpu->env.vregs[i][1].ll);
+ }
}
if (s390_has_feat(S390_FEAT_GUARDED_STORAGE) && len >= ADTL_GS_MIN_SIZE) {
- memcpy(mem + ADTL_GS_OFFSET, &cpu->env.gscb, 32);
+ for (i = 0; i < 4; i++) {
+ sa->gscb[i] = cpu_to_be64(cpu->env.gscb[i]);
+ }
}
- cpu_physical_memory_unmap(mem, len, 1, len);
-
+ cpu_physical_memory_unmap(sa, len, 1, len);
return 0;
}
#endif /* CONFIG_USER_ONLY */
--
2.17.2
next prev parent reply other threads:[~2019-02-22 8:12 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-02-22 8:11 [Qemu-devel] [PATCH v1 0/3] s390x: SIGP + IRQ preparations for TCG vector register support David Hildenbrand
2019-02-22 8:11 ` David Hildenbrand [this message]
2019-02-22 8:55 ` [Qemu-devel] [PATCH v1 1/3] s390x: Use cpu_to_be64 in SIGP STORE ADDITIONAL STATUS Thomas Huth
2019-02-22 11:23 ` Christian Borntraeger
2019-02-22 8:11 ` [Qemu-devel] [PATCH v1 2/3] s390x: use a QEMU-style typedef + name for SIGP save area struct David Hildenbrand
2019-02-22 8:36 ` Thomas Huth
2019-02-22 11:24 ` [Qemu-devel] [qemu-s390x] " Christian Borntraeger
2019-02-22 8:11 ` [Qemu-devel] [PATCH v1 3/3] s390x/tcg: Save vregs to extended mchk save area David Hildenbrand
2019-02-22 9:09 ` Thomas Huth
2019-02-22 10:20 ` Cornelia Huck
2019-02-22 10:16 ` [Qemu-devel] [PATCH v1 0/3] s390x: SIGP + IRQ preparations for TCG vector register support Cornelia Huck
2019-02-22 10:26 ` David Hildenbrand
2019-02-25 11:21 ` Cornelia Huck
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