From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:53685) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzfeS-0000Mq-Tb for qemu-devel@nongnu.org; Fri, 01 Mar 2019 05:44:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzfeQ-0008K5-KB for qemu-devel@nongnu.org; Fri, 01 Mar 2019 05:44:24 -0500 Date: Fri, 1 Mar 2019 11:44:03 +0100 From: Igor Mammedov Message-ID: <20190301114403.1e8324f4@redhat.com> In-Reply-To: <1551407310-32413-1-git-send-email-guoheyi@huawei.com> References: <1551407310-32413-1-git-send-email-guoheyi@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH] hw/arm/acpi: enable SHPC native hot plug List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Heyi Guo Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, wanghaibin.wang@huawei.com, Shannon Zhao , Peter Maydell , "Michael S. Tsirkin" , Heyi Guo On Fri, 1 Mar 2019 10:28:30 +0800 Heyi Guo wrote: > After the introduction of generic PCIe root port and PCIe-PCI bridge, > we will also have SHPC controller on ARM, so just enalbe SHPC native > hot plug. Just out of curiosity, An understand the need for SHPC on plain PCI but in case of PCIe why native PCIe hotplug isn't sufficient? > Cc: Shannon Zhao > Cc: Peter Maydell > Cc: "Michael S. Tsirkin" > Cc: Igor Mammedov > Signed-off-by: Heyi Guo > Signed-off-by: Heyi Guo > --- > hw/arm/virt-acpi-build.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > index 04b62c7..7849ec5 100644 > --- a/hw/arm/virt-acpi-build.c > +++ b/hw/arm/virt-acpi-build.c > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL), > + > + /* > + * Allow OS control for all 5 features: > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability. > + */ > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL), > aml_name("CTRL"))); > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));