From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:40225) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gzgl1-0003V6-HX for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:55:16 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gzgl0-0006me-LR for qemu-devel@nongnu.org; Fri, 01 Mar 2019 06:55:15 -0500 From: David Hildenbrand Date: Fri, 1 Mar 2019 12:54:02 +0100 Message-Id: <20190301115413.27153-22-david@redhat.com> In-Reply-To: <20190301115413.27153-1-david@redhat.com> References: <20190301115413.27153-1-david@redhat.com> Subject: [Qemu-devel] [PATCH v2 21/32] s390x/tcg: Implement VECTOR PERMUTE DOUBLEWORD IMMEDIATE List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: qemu-s390x@nongnu.org, Thomas Huth , Cornelia Huck , Richard Henderson , David Hildenbrand Read the whole input before modifying the destination vector. Reviewed-by: Richard Henderson Signed-off-by: David Hildenbrand --- target/s390x/insn-data.def | 2 ++ target/s390x/translate_vx.inc.c | 16 ++++++++++++++++ 2 files changed, 18 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 5f77462bb1..7314ae4704 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -1021,6 +1021,8 @@ /* VECTOR PACK LOGICAL SATURATE */ F(0xe795, VPKLS, VRR_b, V, 0, 0, 0, 0, vpk, 0, IF_VEC) F(0xe78c, VPERM, VRR_e, V, 0, 0, 0, 0, vperm, 0, IF_VEC) +/* VECTOR PERMUTE DOUBLEWORD IMMEDIATE */ + F(0xe784, VPDI, VRR_c, V, 0, 0, 0, 0, vpdi, 0, IF_VEC) #ifndef CONFIG_USER_ONLY /* COMPARE AND SWAP AND PURGE */ diff --git a/target/s390x/translate_vx.inc.c b/target/s390x/translate_vx.inc.c index d68b548d1c..8afde8fe2c 100644 --- a/target/s390x/translate_vx.inc.c +++ b/target/s390x/translate_vx.inc.c @@ -669,3 +669,19 @@ static DisasJumpType op_vperm(DisasContext *s, DisasOps *o) 0, gen_helper_gvec_vperm); return DISAS_NEXT; } + +static DisasJumpType op_vpdi(DisasContext *s, DisasOps *o) +{ + const uint8_t i2 = extract32(get_field(s->fields, m4), 2, 1); + const uint8_t i3 = extract32(get_field(s->fields, m4), 0, 1); + TCGv_i64 t0 = tcg_temp_new_i64(); + TCGv_i64 t1 = tcg_temp_new_i64(); + + read_vec_element_i64(t0, get_field(s->fields, v2), i2, ES_64); + read_vec_element_i64(t1, get_field(s->fields, v3), i3, ES_64); + write_vec_element_i64(t0, get_field(s->fields, v1), 0, ES_64); + write_vec_element_i64(t1, get_field(s->fields, v1), 1, ES_64); + tcg_temp_free_i64(t0); + tcg_temp_free_i64(t1); + return DISAS_NEXT; +} -- 2.17.2