From: David Gibson <david@gibson.dropbear.id.au>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org
Subject: Re: [Qemu-devel] [PATCH 1/8] target/ppc: introduce single fpr_offset() function
Date: Mon, 4 Mar 2019 16:37:52 +1100 [thread overview]
Message-ID: <20190304053752.GJ7792@umbus.fritz.box> (raw)
In-Reply-To: <20190303172343.13406-2-mark.cave-ayland@ilande.co.uk>
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On Sun, Mar 03, 2019 at 05:23:36PM +0000, Mark Cave-Ayland wrote:
> Instead of having multiple copies of the offset calculation logic, move it to a
> single fpr_offset() function.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied to ppc-for-4.0, thanks.
> ---
> target/ppc/cpu.h | 7 ++++++-
> target/ppc/translate.c | 4 ++--
> 2 files changed, 8 insertions(+), 3 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 26604ddf98..4bb4e42670 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2563,9 +2563,14 @@ static inline bool lsw_reg_in_range(int start, int nregs, int rx)
> }
>
> /* Accessors for FP, VMX and VSX registers */
> +static inline int fpr_offset(int i)
> +{
> + return offsetof(CPUPPCState, vsr[i].u64[0]);
> +}
> +
> static inline uint64_t *cpu_fpr_ptr(CPUPPCState *env, int i)
> {
> - return &env->vsr[i].u64[0];
> + return (uint64_t *)((uintptr_t)env + fpr_offset(i));
> }
>
> static inline uint64_t *cpu_vsrl_ptr(CPUPPCState *env, int i)
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 819221f246..3b1992faf1 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -6677,12 +6677,12 @@ GEN_TM_PRIV_NOOP(trechkpt);
>
> static inline void get_fpr(TCGv_i64 dst, int regno)
> {
> - tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, vsr[regno].u64[0]));
> + tcg_gen_ld_i64(dst, cpu_env, fpr_offset(regno));
> }
>
> static inline void set_fpr(int regno, TCGv_i64 src)
> {
> - tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, vsr[regno].u64[0]));
> + tcg_gen_st_i64(src, cpu_env, fpr_offset(regno));
> }
>
> static inline void get_avr64(TCGv_i64 dst, int regno, bool high)
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2019-03-04 5:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-03 17:23 [Qemu-devel] [PATCH 0/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 1/8] target/ppc: introduce single fpr_offset() function Mark Cave-Ayland
2019-03-03 23:19 ` Richard Henderson
2019-03-04 5:37 ` David Gibson [this message]
2019-03-03 17:23 ` [Qemu-devel] [PATCH 2/8] target/ppc: introduce single vsrl_offset() function Mark Cave-Ayland
2019-03-03 23:20 ` Richard Henderson
2019-03-04 5:39 ` David Gibson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 3/8] target/ppc: move Vsr* macros from internal.h to cpu.h Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 4/8] target/ppc: introduce avrh_offset() and avrl_offset() functions Mark Cave-Ayland
2019-03-03 23:31 ` Richard Henderson
2019-03-05 17:38 ` Mark Cave-Ayland
2019-03-05 21:24 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 5/8] target/ppc: introduce avr_offset() function Mark Cave-Ayland
2019-03-03 23:29 ` Richard Henderson
2019-03-05 17:16 ` Mark Cave-Ayland
2019-03-05 21:16 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 6/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order Mark Cave-Ayland
2019-03-03 23:32 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 7/8] target/ppc: introduce vsrh_offset() function Mark Cave-Ayland
2019-03-03 23:33 ` Richard Henderson
2019-03-05 17:42 ` Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 8/8] target/ppc: simplify get_cpu_vsrh() and get_cpu_vsrl() functions Mark Cave-Ayland
2019-03-03 23:35 ` Richard Henderson
2019-03-05 18:16 ` Mark Cave-Ayland
2019-03-06 21:48 ` [Qemu-devel] [Qemu-ppc] " Mark Cave-Ayland
2019-03-06 22:27 ` Richard Henderson
2019-03-04 5:43 ` [Qemu-devel] [PATCH 0/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order David Gibson
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