From: David Gibson <david@gibson.dropbear.id.au>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org
Subject: Re: [Qemu-devel] [PATCH 2/8] target/ppc: introduce single vsrl_offset() function
Date: Mon, 4 Mar 2019 16:39:38 +1100 [thread overview]
Message-ID: <20190304053938.GK7792@umbus.fritz.box> (raw)
In-Reply-To: <20190303172343.13406-3-mark.cave-ayland@ilande.co.uk>
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On Sun, Mar 03, 2019 at 05:23:37PM +0000, Mark Cave-Ayland wrote:
> Instead of having multiple copies of the offset calculation logic, move it to a
> single vsrl_offset() function.
>
> This commit also renames the existing get_vsr()/set_vsr() functions to
> get_vsrl()/set_vsrl() which better describes their purpose.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Applied to ppc-for-4.0, thanks.
> ---
> target/ppc/cpu.h | 7 ++++++-
> target/ppc/translate/vsx-impl.inc.c | 12 ++++++------
> 2 files changed, 12 insertions(+), 7 deletions(-)
>
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 4bb4e42670..4a7df13c2d 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2573,9 +2573,14 @@ static inline uint64_t *cpu_fpr_ptr(CPUPPCState *env, int i)
> return (uint64_t *)((uintptr_t)env + fpr_offset(i));
> }
>
> +static inline int vsrl_offset(int i)
> +{
> + return offsetof(CPUPPCState, vsr[i].u64[1]);
> +}
> +
> static inline uint64_t *cpu_vsrl_ptr(CPUPPCState *env, int i)
> {
> - return &env->vsr[i].u64[1];
> + return (uint64_t *)((uintptr_t)env + vsrl_offset(i));
> }
>
> static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i)
> diff --git a/target/ppc/translate/vsx-impl.inc.c b/target/ppc/translate/vsx-impl.inc.c
> index e73197e717..381ae0f2e9 100644
> --- a/target/ppc/translate/vsx-impl.inc.c
> +++ b/target/ppc/translate/vsx-impl.inc.c
> @@ -1,13 +1,13 @@
> /*** VSX extension ***/
>
> -static inline void get_vsr(TCGv_i64 dst, int n)
> +static inline void get_vsrl(TCGv_i64 dst, int n)
> {
> - tcg_gen_ld_i64(dst, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1]));
> + tcg_gen_ld_i64(dst, cpu_env, vsrl_offset(n));
> }
>
> -static inline void set_vsr(int n, TCGv_i64 src)
> +static inline void set_vsrl(int n, TCGv_i64 src)
> {
> - tcg_gen_st_i64(src, cpu_env, offsetof(CPUPPCState, vsr[n].u64[1]));
> + tcg_gen_st_i64(src, cpu_env, vsrl_offset(n));
> }
>
> static inline int vsr_full_offset(int n)
> @@ -27,7 +27,7 @@ static inline void get_cpu_vsrh(TCGv_i64 dst, int n)
> static inline void get_cpu_vsrl(TCGv_i64 dst, int n)
> {
> if (n < 32) {
> - get_vsr(dst, n);
> + get_vsrl(dst, n);
> } else {
> get_avr64(dst, n - 32, false);
> }
> @@ -45,7 +45,7 @@ static inline void set_cpu_vsrh(int n, TCGv_i64 src)
> static inline void set_cpu_vsrl(int n, TCGv_i64 src)
> {
> if (n < 32) {
> - set_vsr(n, src);
> + set_vsrl(n, src);
> } else {
> set_avr64(n - 32, src, false);
> }
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2019-03-04 5:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-03 17:23 [Qemu-devel] [PATCH 0/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 1/8] target/ppc: introduce single fpr_offset() function Mark Cave-Ayland
2019-03-03 23:19 ` Richard Henderson
2019-03-04 5:37 ` David Gibson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 2/8] target/ppc: introduce single vsrl_offset() function Mark Cave-Ayland
2019-03-03 23:20 ` Richard Henderson
2019-03-04 5:39 ` David Gibson [this message]
2019-03-03 17:23 ` [Qemu-devel] [PATCH 3/8] target/ppc: move Vsr* macros from internal.h to cpu.h Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 4/8] target/ppc: introduce avrh_offset() and avrl_offset() functions Mark Cave-Ayland
2019-03-03 23:31 ` Richard Henderson
2019-03-05 17:38 ` Mark Cave-Ayland
2019-03-05 21:24 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 5/8] target/ppc: introduce avr_offset() function Mark Cave-Ayland
2019-03-03 23:29 ` Richard Henderson
2019-03-05 17:16 ` Mark Cave-Ayland
2019-03-05 21:16 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 6/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order Mark Cave-Ayland
2019-03-03 23:32 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 7/8] target/ppc: introduce vsrh_offset() function Mark Cave-Ayland
2019-03-03 23:33 ` Richard Henderson
2019-03-05 17:42 ` Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 8/8] target/ppc: simplify get_cpu_vsrh() and get_cpu_vsrl() functions Mark Cave-Ayland
2019-03-03 23:35 ` Richard Henderson
2019-03-05 18:16 ` Mark Cave-Ayland
2019-03-06 21:48 ` [Qemu-devel] [Qemu-ppc] " Mark Cave-Ayland
2019-03-06 22:27 ` Richard Henderson
2019-03-04 5:43 ` [Qemu-devel] [PATCH 0/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order David Gibson
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