From: David Gibson <david@gibson.dropbear.id.au>
To: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, richard.henderson@linaro.org
Subject: Re: [Qemu-devel] [PATCH 0/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order
Date: Mon, 4 Mar 2019 16:43:09 +1100 [thread overview]
Message-ID: <20190304054309.GL7792@umbus.fritz.box> (raw)
In-Reply-To: <20190303172343.13406-1-mark.cave-ayland@ilande.co.uk>
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On Sun, Mar 03, 2019 at 05:23:35PM +0000, Mark Cave-Ayland wrote:
> After some investigation into Andrew's report of corruption in his ppc64le
> tests at https://lists.gnu.org/archive/html/qemu-devel/2019-02/msg07234.html, I
> discovered the underlying cause was that the first 32 VSX registers are not
> stored in host endian order.
>
> This is something that Richard and I had discussed before, but missed that with
> VSX if you have source registers from different register sets then even logical
> operations will give you the wrong result.
>
> Rather than revert 7b8fe477e1 "target/ppc: convert VSX logical operations to
> vector operations" let's keep the use of the accelerated vector instructions,
> and instead fix the real problem which is to switch the first 32 VSX registers
> to host endian order matching the VMX registers.
>
> Patches 1-5 aim to consolidate the offset calculations for both CPUPPCState
> and the associated _ptr() functions into one single place.
>
> With this preliminary work complete, patch 6 switches the first 32 registers
> into host endian order without too much difficulty.
>
> Finally now that all VSX registers are stored in the same way, the vsr offset
> functions and get_cpu_vsrh()/get_cpu_vsrl() can be simplified accordingly.
>
> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
I've applied the first two patches. The rest I'll wait on a respin
addressing Richard's comments.
>
>
> Mark Cave-Ayland (8):
> target/ppc: introduce single fpr_offset() function
> target/ppc: introduce single vsrl_offset() function
> target/ppc: move Vsr* macros from internal.h to cpu.h
> target/ppc: introduce avrh_offset() and avrl_offset() functions
> target/ppc: introduce avr_offset() function
> target/ppc: switch fpr/vsrl registers so all VSX registers are in host
> endian order
> target/ppc: introduce vsrh_offset() function
> target/ppc: simplify get_cpu_vsrh() and get_cpu_vsrl() functions
>
> target/ppc/cpu.h | 56 +++++++++++++++++++++++++++++++++++--
> target/ppc/internal.h | 27 +++---------------
> target/ppc/machine.c | 8 +++---
> target/ppc/translate.c | 28 ++++++++-----------
> target/ppc/translate/vmx-impl.inc.c | 27 ++++++++----------
> target/ppc/translate/vsx-impl.inc.c | 39 +++-----------------------
> 6 files changed, 88 insertions(+), 97 deletions(-)
>
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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prev parent reply other threads:[~2019-03-04 5:43 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-03 17:23 [Qemu-devel] [PATCH 0/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 1/8] target/ppc: introduce single fpr_offset() function Mark Cave-Ayland
2019-03-03 23:19 ` Richard Henderson
2019-03-04 5:37 ` David Gibson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 2/8] target/ppc: introduce single vsrl_offset() function Mark Cave-Ayland
2019-03-03 23:20 ` Richard Henderson
2019-03-04 5:39 ` David Gibson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 3/8] target/ppc: move Vsr* macros from internal.h to cpu.h Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 4/8] target/ppc: introduce avrh_offset() and avrl_offset() functions Mark Cave-Ayland
2019-03-03 23:31 ` Richard Henderson
2019-03-05 17:38 ` Mark Cave-Ayland
2019-03-05 21:24 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 5/8] target/ppc: introduce avr_offset() function Mark Cave-Ayland
2019-03-03 23:29 ` Richard Henderson
2019-03-05 17:16 ` Mark Cave-Ayland
2019-03-05 21:16 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 6/8] target/ppc: switch fpr/vsrl registers so all VSX registers are in host endian order Mark Cave-Ayland
2019-03-03 23:32 ` Richard Henderson
2019-03-03 17:23 ` [Qemu-devel] [PATCH 7/8] target/ppc: introduce vsrh_offset() function Mark Cave-Ayland
2019-03-03 23:33 ` Richard Henderson
2019-03-05 17:42 ` Mark Cave-Ayland
2019-03-03 17:23 ` [Qemu-devel] [PATCH 8/8] target/ppc: simplify get_cpu_vsrh() and get_cpu_vsrl() functions Mark Cave-Ayland
2019-03-03 23:35 ` Richard Henderson
2019-03-05 18:16 ` Mark Cave-Ayland
2019-03-06 21:48 ` [Qemu-devel] [Qemu-ppc] " Mark Cave-Ayland
2019-03-06 22:27 ` Richard Henderson
2019-03-04 5:43 ` David Gibson [this message]
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