From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([209.51.188.92]:32775) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1h0pUv-0006Js-6v for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:27:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1h0pUu-0004ug-BN for qemu-devel@nongnu.org; Mon, 04 Mar 2019 10:27:21 -0500 Date: Mon, 4 Mar 2019 16:27:11 +0100 From: Igor Mammedov Message-ID: <20190304162711.105e09f2@redhat.com> In-Reply-To: <1551705934-28745-1-git-send-email-guoheyi@huawei.com> References: <1551705934-28745-1-git-send-email-guoheyi@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Subject: Re: [Qemu-devel] [PATCH v2] hw/arm/acpi: enable SHPC native hot plug List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Heyi Guo Cc: qemu-arm@nongnu.org, qemu-devel@nongnu.org, wanghaibin.wang@huawei.com, Shannon Zhao , Peter Maydell , "Michael S. Tsirkin" On Mon, 4 Mar 2019 21:25:34 +0800 Heyi Guo wrote: > After the introduction of generic PCIe root port and PCIe-PCI bridge, > we will also have SHPC controller on ARM, so just enalbe SHPC native > hot plug. > > Cc: Shannon Zhao > Cc: Peter Maydell > Cc: "Michael S. Tsirkin" > Cc: Igor Mammedov > Reviewed-by: Michael S. Tsirkin > Signed-off-by: Heyi Guo > --- > hw/arm/virt-acpi-build.c | 7 ++++++- > 1 file changed, 6 insertions(+), 1 deletion(-) > > diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c > index 04b62c7..7849ec5 100644 > --- a/hw/arm/virt-acpi-build.c > +++ b/hw/arm/virt-acpi-build.c > @@ -265,7 +265,12 @@ static void acpi_dsdt_add_pci(Aml *scope, const MemMapEntry *memmap, > aml_create_dword_field(aml_arg(3), aml_int(8), "CDW3")); > aml_append(ifctx, aml_store(aml_name("CDW2"), aml_name("SUPP"))); > aml_append(ifctx, aml_store(aml_name("CDW3"), aml_name("CTRL"))); > - aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1D), NULL), > + > + /* > + * Allow OS control for all 5 features: > + * PCIeHotplug SHPCHotplug PME AER PCIeCapability. > + */ > + aml_append(ifctx, aml_store(aml_and(aml_name("CTRL"), aml_int(0x1F), NULL), > aml_name("CTRL"))); aml_store here is excessive, you can use shorter variant that x86 uses aml_and(a_ctrl, aml_int(0x1F), a_ctrl)); the last argument of aml_and() is the target var where to store computation result > > ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(1), aml_int(0x1))));