qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: "Cédric Le Goater" <clg@kaod.org>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org,
	"Cédric Le Goater" <clg@kaod.org>
Subject: [Qemu-devel] [PATCH 16/27] ppc/pnv: lpc: fix OPB address ranges
Date: Wed,  6 Mar 2019 09:50:21 +0100	[thread overview]
Message-ID: <20190306085032.15744-17-clg@kaod.org> (raw)
In-Reply-To: <20190306085032.15744-1-clg@kaod.org>

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/ppc/pnv_lpc.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
index 9b18ce55e391..547be609cafe 100644
--- a/hw/ppc/pnv_lpc.c
+++ b/hw/ppc/pnv_lpc.c
@@ -89,10 +89,11 @@ enum {
 #define LPC_FW_OPB_SIZE         0x10000000
 
 #define LPC_OPB_REGS_OPB_ADDR   0xc0010000
-#define LPC_OPB_REGS_OPB_SIZE   0x00002000
+#define LPC_OPB_REGS_OPB_SIZE   0x00000060
+#define LPC_OPB_REGS_OPBA_ADDR  0xc0011000
+#define LPC_OPB_REGS_OPBA_SIZE  0x00000008
 #define LPC_HC_REGS_OPB_ADDR    0xc0012000
-#define LPC_HC_REGS_OPB_SIZE    0x00001000
-
+#define LPC_HC_REGS_OPB_SIZE    0x00000100
 
 static int pnv_lpc_dt_xscom(PnvXScomInterface *dev, void *fdt, int xscom_offset)
 {
-- 
2.20.1

  parent reply	other threads:[~2019-03-06  8:51 UTC|newest]

Thread overview: 55+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-06  8:50 [Qemu-devel] [PATCH 00/27] ppc: add POWER9 support to the PowerNV platform Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 01/27] ppc/xive: hardwire the Physical CAM line of the thread context Cédric Le Goater
2019-03-07  1:19   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 02/27] ppc: externalize ppc_get_vcpu_by_pir() Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 03/27] ppc/xive: export the TIMA memory accessors Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 04/27] ppc/pnv: export the xive_router_notify() routine Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 05/27] ppc/pnv: change the CPU machine_data presenter type to Object * Cédric Le Goater
2019-03-07  1:36   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 06/27] ppc/pnv: add a XIVE interrupt controller model for POWER9 Cédric Le Goater
2019-03-07  1:37   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 07/27] ppc/pnv: introduce a new dt_populate() operation to the chip model Cédric Le Goater
2019-03-07  1:44   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 08/27] ppc/pnv: introduce a new pic_print_info() " Cédric Le Goater
2019-03-07  1:46   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 09/27] ppc/xive: activate HV support Cédric Le Goater
2019-03-07  1:48   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 10/27] ppc/xive: Make XIVE generate the proper interrupt types Cédric Le Goater
2019-03-07  3:29   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 11/27] ppc/pnv: fix logging primitives using Ox Cédric Le Goater
2019-03-07  3:30   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 12/27] ppc/pnv: psi: add a PSIHB_REG macro Cédric Le Goater
2019-03-07  3:30   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 13/27] ppc/pnv: psi: add a reset handler Cédric Le Goater
2019-03-07  3:32   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 14/27] ppc/pnv: add a PSI bridge model class Cédric Le Goater
2019-03-07  4:05   ` David Gibson
2019-03-07  4:08     ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 15/27] ppc/pnv: add a PSI bridge model for POWER9 Cédric Le Goater
2019-03-07  4:10   ` David Gibson
2019-03-07  6:37     ` Cédric Le Goater
2019-03-07 22:33       ` Cédric Le Goater
2019-03-08  0:17       ` David Gibson
2019-03-08  6:45         ` Cédric Le Goater
2019-03-06  8:50 ` Cédric Le Goater [this message]
2019-03-07  4:11   ` [Qemu-devel] [PATCH 16/27] ppc/pnv: lpc: fix OPB address ranges David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 17/27] ppc/pnv: add a LPC Controller model class Cédric Le Goater
2019-03-07  4:12   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 18/27] ppc/pnv: add a LPC Controller model for POWER9 Cédric Le Goater
2019-03-07  4:18   ` David Gibson
2019-03-07  7:07     ` Cédric Le Goater
2019-03-08  0:19       ` David Gibson
2019-03-08  6:49         ` Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 19/27] ppc/pnv: add SerIRQ routing registers Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 20/27] ppc/pnv: add a OCC model class Cédric Le Goater
2019-03-07  4:26   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 21/27] ppc/pnv: add a OCC model for POWER9 Cédric Le Goater
2019-03-07  4:27   ` David Gibson
2019-03-07  7:47     ` Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 22/27] ppc/pnv: extend XSCOM core support " Cédric Le Goater
2019-03-07  4:28   ` David Gibson
2019-03-06  8:50 ` [Qemu-devel] [PATCH 23/27] ppc/pnv: POWER9 XSCOM quad support Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 24/27] ppc/pnv: activate XSCOM tests for POWER9 Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 25/27] ppc/pnv: add more dummy XSCOM addresses Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 26/27] ppc/pnv: add a "ibm, opal/power-mgt" device tree node on POWER9 Cédric Le Goater
2019-03-06  8:50 ` [Qemu-devel] [PATCH 27/27] target/ppc: add HV support for POWER9 Cédric Le Goater

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20190306085032.15744-17-clg@kaod.org \
    --to=clg@kaod.org \
    --cc=david@gibson.dropbear.id.au \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).