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Violators will be prosecuted for from ; Wed, 6 Mar 2019 08:50:55 -0000 From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Date: Wed, 6 Mar 2019 09:50:22 +0100 In-Reply-To: <20190306085032.15744-1-clg@kaod.org> References: <20190306085032.15744-1-clg@kaod.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Message-Id: <20190306085032.15744-18-clg@kaod.org> Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] [PATCH 17/27] ppc/pnv: add a LPC Controller model class List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: David Gibson Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= It will ease the introduction of the LPC Controller model for POWER9. Signed-off-by: C=C3=A9dric Le Goater --- include/hw/ppc/pnv_lpc.h | 16 ++++++++ hw/ppc/pnv.c | 2 +- hw/ppc/pnv_lpc.c | 85 ++++++++++++++++++++++++++++------------ 3 files changed, 78 insertions(+), 25 deletions(-) diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h index d657489b07ce..242baecdcb93 100644 --- a/include/hw/ppc/pnv_lpc.h +++ b/include/hw/ppc/pnv_lpc.h @@ -24,6 +24,9 @@ #define TYPE_PNV_LPC "pnv-lpc" #define PNV_LPC(obj) \ OBJECT_CHECK(PnvLpcController, (obj), TYPE_PNV_LPC) +#define TYPE_PNV8_LPC TYPE_PNV_LPC "-POWER8" +#define PNV8_LPC(obj) \ + OBJECT_CHECK(PnvLpc, (obj), TYPE_PNV8_LPC) =20 typedef struct PnvLpcController { DeviceState parent; @@ -70,6 +73,19 @@ typedef struct PnvLpcController { PnvPsi *psi; } PnvLpcController; =20 +#define PNV_LPC_CLASS(klass) \ + OBJECT_CLASS_CHECK(PnvLpcClass, (klass), TYPE_PNV_LPC) +#define PNV_LPC_GET_CLASS(obj) \ + OBJECT_GET_CLASS(PnvLpcClass, (obj), TYPE_PNV_LPC) + +typedef struct PnvLpcClass { + DeviceClass parent_class; + + int psi_irq; + + DeviceRealize parent_realize; +} PnvLpcClass; + ISABus *pnv_lpc_isa_create(PnvLpcController *lpc, bool use_cpld, Error *= *errp); =20 #endif /* _PPC_PNV_LPC_H */ diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 4375f97c7135..7176e1b68d0e 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -794,7 +794,7 @@ static void pnv_chip_power8_instance_init(Object *obj= ) OBJECT(qdev_get_machine()), &error_ab= ort); =20 object_initialize_child(obj, "lpc", &chip8->lpc, sizeof(chip8->lpc)= , - TYPE_PNV_LPC, &error_abort, NULL); + TYPE_PNV8_LPC, &error_abort, NULL); object_property_add_const_link(OBJECT(&chip8->lpc), "psi", OBJECT(&chip8->psi), &error_abort); =20 diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c index 547be609cafe..3c509a30a0af 100644 --- a/hw/ppc/pnv_lpc.c +++ b/hw/ppc/pnv_lpc.c @@ -245,6 +245,7 @@ static const MemoryRegionOps pnv_lpc_xscom_ops =3D { static void pnv_lpc_eval_irqs(PnvLpcController *lpc) { bool lpc_to_opb_irq =3D false; + PnvLpcClass *plc =3D PNV_LPC_GET_CLASS(lpc); =20 /* Update LPC controller to OPB line */ if (lpc->lpc_hc_irqser_ctrl & LPC_HC_IRQSER_EN) { @@ -267,7 +268,7 @@ static void pnv_lpc_eval_irqs(PnvLpcController *lpc) lpc->opb_irq_stat |=3D lpc->opb_irq_input & lpc->opb_irq_mask; =20 /* Reflect the interrupt */ - pnv_psi_irq_set(lpc->psi, PSIHB_IRQ_LPC_I2C, lpc->opb_irq_stat !=3D = 0); + pnv_psi_irq_set(lpc->psi, plc->psi_irq, lpc->opb_irq_stat !=3D 0); } =20 static uint64_t lpc_hc_read(void *opaque, hwaddr addr, unsigned size) @@ -419,11 +420,65 @@ static const MemoryRegionOps opb_master_ops =3D { }, }; =20 +static void pnv_lpc_power8_realize(DeviceState *dev, Error **errp) +{ + PnvLpcController *lpc =3D PNV_LPC(dev); + PnvLpcClass *plc =3D PNV_LPC_GET_CLASS(dev); + Error *local_err =3D NULL; + + plc->parent_realize(dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + /* P8 uses a XSCOM region for LPC registers */ + pnv_xscom_region_init(&lpc->xscom_regs, OBJECT(lpc), + &pnv_lpc_xscom_ops, lpc, "xscom-lpc", + PNV_XSCOM_LPC_SIZE); +} + +static void pnv_lpc_power8_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + PnvXScomInterfaceClass *xdc =3D PNV_XSCOM_INTERFACE_CLASS(klass); + PnvLpcClass *plc =3D PNV_LPC_CLASS(klass); + + dc->desc =3D "PowerNV LPC Controller POWER8"; + + xdc->dt_xscom =3D pnv_lpc_dt_xscom; + + plc->psi_irq =3D PSIHB_IRQ_LPC_I2C; + + device_class_set_parent_realize(dc, pnv_lpc_power8_realize, + &plc->parent_realize); +} + +static const TypeInfo pnv_lpc_power8_info =3D { + .name =3D TYPE_PNV8_LPC, + .parent =3D TYPE_PNV_LPC, + .instance_size =3D sizeof(PnvLpcController), + .class_init =3D pnv_lpc_power8_class_init, + .interfaces =3D (InterfaceInfo[]) { + { TYPE_PNV_XSCOM_INTERFACE }, + { } + } +}; + static void pnv_lpc_realize(DeviceState *dev, Error **errp) { PnvLpcController *lpc =3D PNV_LPC(dev); Object *obj; - Error *error =3D NULL; + Error *local_err =3D NULL; + + obj =3D object_property_get_link(OBJECT(dev), "psi", &local_err); + if (!obj) { + error_propagate(errp, local_err); + error_prepend(errp, "required link 'psi' not found: "); + return; + } + /* The LPC controller needs PSI to generate interrupts */ + lpc->psi =3D PNV_PSI(obj); =20 /* Reg inits */ lpc->lpc_hc_fw_rd_acc_size =3D LPC_HC_FW_RD_4B; @@ -463,46 +518,28 @@ static void pnv_lpc_realize(DeviceState *dev, Error= **errp) "lpc-hc", LPC_HC_REGS_OPB_SIZE); memory_region_add_subregion(&lpc->opb_mr, LPC_HC_REGS_OPB_ADDR, &lpc->lpc_hc_regs); - - /* XScom region for LPC registers */ - pnv_xscom_region_init(&lpc->xscom_regs, OBJECT(dev), - &pnv_lpc_xscom_ops, lpc, "xscom-lpc", - PNV_XSCOM_LPC_SIZE); - - /* get PSI object from chip */ - obj =3D object_property_get_link(OBJECT(dev), "psi", &error); - if (!obj) { - error_setg(errp, "%s: required link 'psi' not found: %s", - __func__, error_get_pretty(error)); - return; - } - lpc->psi =3D PNV_PSI(obj); } =20 static void pnv_lpc_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); - PnvXScomInterfaceClass *xdc =3D PNV_XSCOM_INTERFACE_CLASS(klass); - - xdc->dt_xscom =3D pnv_lpc_dt_xscom; =20 dc->realize =3D pnv_lpc_realize; + dc->desc =3D "PowerNV LPC Controller"; } =20 static const TypeInfo pnv_lpc_info =3D { .name =3D TYPE_PNV_LPC, .parent =3D TYPE_DEVICE, - .instance_size =3D sizeof(PnvLpcController), .class_init =3D pnv_lpc_class_init, - .interfaces =3D (InterfaceInfo[]) { - { TYPE_PNV_XSCOM_INTERFACE }, - { } - } + .class_size =3D sizeof(PnvLpcClass), + .abstract =3D true, }; =20 static void pnv_lpc_register_types(void) { type_register_static(&pnv_lpc_info); + type_register_static(&pnv_lpc_power8_info); } =20 type_init(pnv_lpc_register_types) --=20 2.20.1