From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org
Subject: [Qemu-devel] [PATCH v4 14/22] target/arm: Implement the access tag cache flushes
Date: Thu, 7 Mar 2019 09:04:32 -0800 [thread overview]
Message-ID: <20190307170440.3113-15-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190307170440.3113-1-richard.henderson@linaro.org>
Like the regular data cache flushes, these are nops within qemu.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/helper.c | 48 +++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 48 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 7b30e1a1a9..a16c87d0d9 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5793,6 +5793,54 @@ static const ARMCPRegInfo mte_reginfo[] = {
{ .name = "GMID_EL1", .state = ARM_CP_STATE_AA64,
.opc0 = 3, .opc1 = 1, .crn = 0, .crm = 0, .opc2 = 4,
.access = PL1_R, .type = ARM_CP_CONST, .resetvalue = GMID_EL1_BS },
+ { .name = "IGVAC", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 6, .opc2 = 3,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "IGSW", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 6, .opc2 = 4,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGSW", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 10, .opc2 = 4,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CIGSW", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 14, .opc2 = 4,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGVAC", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 10, .opc2 = 3,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGVAP", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 12, .opc2 = 3,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGVADP", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 13, .opc2 = 3,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CIGVAC", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 14, .opc2 = 3,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "IGDVAC", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 6, .opc2 = 5,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "IGDSW", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 6, .opc2 = 6,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGDSW", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 10, .opc2 = 6,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CIGDSW", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 0, .crn = 7, .crm = 14, .opc2 = 6,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGDVAC", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 10, .opc2 = 5,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGDVAP", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 12, .opc2 = 5,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CGDVADP", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 13, .opc2 = 5,
+ .type = ARM_CP_NOP, .access = PL1_W },
+ { .name = "CIGDVAC", .state = ARM_CP_STATE_AA64,
+ .opc0 = 1, .opc1 = 3, .crn = 7, .crm = 14, .opc2 = 5,
+ .type = ARM_CP_NOP, .access = PL1_W },
REGINFO_SENTINEL
};
#endif
--
2.17.2
next prev parent reply other threads:[~2019-03-07 17:06 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-07 17:04 [Qemu-devel] [PATCH v4 00/22] target/arm: Implement ARMv8.5-MemTag, system mode Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 01/22] target/arm: Add MTE_ACTIVE to tb_flags Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 02/22] target/arm: Extract TCMA with ARMVAParameters Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 03/22] target/arm: Add MTE system registers Richard Henderson
2019-03-08 10:31 ` Laurent Desnogues
2019-03-08 10:37 ` Laurent Desnogues
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 04/22] target/arm: Add helper_mte_check{1, 2} Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 05/22] target/arm: Suppress tag check for sp+offset Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 06/22] target/arm: Implement the IRG instruction Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 07/22] target/arm: Implement ADDG, SUBG instructions Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 08/22] target/arm: Implement the GMI instruction Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 09/22] target/arm: Implement the SUBP instruction Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 10/22] target/arm: Define arm_cpu_do_unaligned_access for CONFIG_USER_ONLY Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 11/22] target/arm: Implement LDG, STG, ST2G instructions Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 12/22] target/arm: Implement the STGP instruction Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 13/22] target/arm: Implement the LDGM and STGM instructions Richard Henderson
2019-03-07 17:04 ` Richard Henderson [this message]
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 15/22] target/arm: Clean address for DC ZVA Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 16/22] target/arm: Implement data cache set allocation tags Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 17/22] target/arm: Set PSTATE.TCO on exception entry Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 18/22] target/arm: Cache the Tagged bit for a page in MemTxAttrs Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 19/22] target/arm: Create tagged ram when MTE is enabled Richard Henderson
2019-07-22 16:03 ` Peter Maydell
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 20/22] target/arm: Create a TLB entry for tag physical address space Richard Henderson
2019-07-19 15:48 ` Peter Maydell
2019-07-19 21:31 ` Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 21/22] target/arm: Add allocation tag storage for system mode Richard Henderson
2019-03-07 17:04 ` [Qemu-devel] [PATCH v4 22/22] target/arm: Enable MTE Richard Henderson
2019-03-07 17:35 ` [Qemu-devel] [PATCH v4 00/22] target/arm: Implement ARMv8.5-MemTag, system mode no-reply
2019-03-08 18:40 ` no-reply
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