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From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 07/15] ppc/pnv: add SerIRQ routing registers
Date: Fri, 8 Mar 2019 11:28:28 +1100	[thread overview]
Message-ID: <20190308002828.GK7722@umbus.fritz.box> (raw)
In-Reply-To: <20190307223548.20516-8-clg@kaod.org>

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On Thu, Mar 07, 2019 at 11:35:40PM +0100, Cédric Le Goater wrote:
> This is just a simple reminder that SerIRQ routing should be
> addressed.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---

Applied, thanks.

>  include/hw/ppc/pnv_lpc.h |  2 ++
>  hw/ppc/pnv_lpc.c         | 14 ++++++++++++++
>  2 files changed, 16 insertions(+)
> 
> diff --git a/include/hw/ppc/pnv_lpc.h b/include/hw/ppc/pnv_lpc.h
> index 242b18081caa..413579792ed1 100644
> --- a/include/hw/ppc/pnv_lpc.h
> +++ b/include/hw/ppc/pnv_lpc.h
> @@ -55,6 +55,8 @@ typedef struct PnvLpcController {
>      MemoryRegion opb_master_regs;
>  
>      /* OPB Master LS registers */
> +    uint32_t opb_irq_route0;
> +    uint32_t opb_irq_route1;
>      uint32_t opb_irq_stat;
>      uint32_t opb_irq_mask;
>      uint32_t opb_irq_pol;
> diff --git a/hw/ppc/pnv_lpc.c b/hw/ppc/pnv_lpc.c
> index 6df694e0abc1..641e2046db92 100644
> --- a/hw/ppc/pnv_lpc.c
> +++ b/hw/ppc/pnv_lpc.c
> @@ -39,6 +39,8 @@ enum {
>  };
>  
>  /* OPB Master LS registers */
> +#define OPB_MASTER_LS_ROUTE0    0x8
> +#define OPB_MASTER_LS_ROUTE1    0xC
>  #define OPB_MASTER_LS_IRQ_STAT  0x50
>  #define   OPB_MASTER_IRQ_LPC            0x00000800
>  #define OPB_MASTER_LS_IRQ_MASK  0x54
> @@ -521,6 +523,12 @@ static uint64_t opb_master_read(void *opaque, hwaddr addr, unsigned size)
>      uint64_t val = 0xfffffffffffffffful;
>  
>      switch (addr) {
> +    case OPB_MASTER_LS_ROUTE0: /* TODO */
> +        val = lpc->opb_irq_route0;
> +        break;
> +    case OPB_MASTER_LS_ROUTE1: /* TODO */
> +        val = lpc->opb_irq_route1;
> +        break;
>      case OPB_MASTER_LS_IRQ_STAT:
>          val = lpc->opb_irq_stat;
>          break;
> @@ -547,6 +555,12 @@ static void opb_master_write(void *opaque, hwaddr addr,
>      PnvLpcController *lpc = opaque;
>  
>      switch (addr) {
> +    case OPB_MASTER_LS_ROUTE0: /* TODO */
> +        lpc->opb_irq_route0 = val;
> +        break;
> +    case OPB_MASTER_LS_ROUTE1: /* TODO */
> +        lpc->opb_irq_route1 = val;
> +        break;
>      case OPB_MASTER_LS_IRQ_STAT:
>          lpc->opb_irq_stat &= ~val;
>          pnv_lpc_eval_irqs(lpc);

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2019-03-08  1:08 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-03-07 22:35 [Qemu-devel] [PATCH v2 00/15] ppc: add POWER9 support to the PowerNV platform Cédric Le Goater
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 01/15] ppc/pnv: add a PSI bridge class model Cédric Le Goater
2019-03-07 23:57   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 02/15] ppc/pnv: add a PSI bridge model for POWER9 Cédric Le Goater
2019-03-07 23:58   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 03/15] ppc/pnv: lpc: fix OPB address ranges Cédric Le Goater
2019-03-07 23:59   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 04/15] ppc/pnv: add a LPC Controller class model Cédric Le Goater
2019-03-07 23:59   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 05/15] ppc/pnv: add a 'dt_isa_nodename' to the chip Cédric Le Goater
2019-03-08  0:01   ` David Gibson
2019-03-08  6:55     ` Cédric Le Goater
2019-03-08 11:08       ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 06/15] ppc/pnv: add a LPC Controller model for POWER9 Cédric Le Goater
2019-03-08  0:28   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 07/15] ppc/pnv: add SerIRQ routing registers Cédric Le Goater
2019-03-08  0:28   ` David Gibson [this message]
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 08/15] ppc/pnv: add a OCC model class Cédric Le Goater
2019-03-08  0:29   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 09/15] ppc/pnv: add a OCC model for POWER9 Cédric Le Goater
2019-03-08  0:30   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 10/15] ppc/pnv: extend XSCOM core support " Cédric Le Goater
2019-03-08  0:31   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 11/15] ppc/pnv: POWER9 XSCOM quad support Cédric Le Goater
2019-03-08  0:32   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 12/15] ppc/pnv: activate XSCOM tests for POWER9 Cédric Le Goater
2019-03-08  0:33   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 13/15] ppc/pnv: add more dummy XSCOM addresses Cédric Le Goater
2019-03-08  0:56   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 14/15] ppc/pnv: add a "ibm, opal/power-mgt" device tree node on POWER9 Cédric Le Goater
2019-03-08  0:58   ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 15/15] target/ppc: add HV support for POWER9 Cédric Le Goater
2019-03-08  0:59   ` David Gibson

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