From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH v2 13/15] ppc/pnv: add more dummy XSCOM addresses
Date: Fri, 8 Mar 2019 11:56:53 +1100 [thread overview]
Message-ID: <20190308005653.GQ7722@umbus.fritz.box> (raw)
In-Reply-To: <20190307223548.20516-14-clg@kaod.org>
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On Thu, Mar 07, 2019 at 11:35:46PM +0100, Cédric Le Goater wrote:
> To improve OPAL/skiboot support. We don't need to strictly model these
> XSCOM accesses.
>
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
Applied, thanks.
> ---
> hw/ppc/pnv_xscom.c | 33 +++++++++++++++++++++++++++------
> 1 file changed, 27 insertions(+), 6 deletions(-)
>
> diff --git a/hw/ppc/pnv_xscom.c b/hw/ppc/pnv_xscom.c
> index 46fae41f32b0..c285ef514e88 100644
> --- a/hw/ppc/pnv_xscom.c
> +++ b/hw/ppc/pnv_xscom.c
> @@ -64,11 +64,21 @@ static uint64_t xscom_read_default(PnvChip *chip, uint32_t pcba)
> switch (pcba) {
> case 0xf000f:
> return PNV_CHIP_GET_CLASS(chip)->chip_cfam_id;
> + case 0x18002: /* ECID2 */
> + return 0;
> +
> case 0x1010c00: /* PIBAM FIR */
> case 0x1010c03: /* PIBAM FIR MASK */
> - case 0x2020007: /* ADU stuff */
> - case 0x2020009: /* ADU stuff */
> - case 0x202000f: /* ADU stuff */
> +
> + /* P9 xscom reset */
> + case 0x0090018: /* Receive status reg */
> + case 0x0090012: /* log register */
> + case 0x0090013: /* error register */
> +
> + /* P8 xscom reset */
> + case 0x2020007: /* ADU stuff, log register */
> + case 0x2020009: /* ADU stuff, error register */
> + case 0x202000f: /* ADU stuff, receive status register*/
> return 0;
> case 0x2013f00: /* PBA stuff */
> case 0x2013f01: /* PBA stuff */
> @@ -100,9 +110,20 @@ static bool xscom_write_default(PnvChip *chip, uint32_t pcba, uint64_t val)
> case 0x1010c03: /* PIBAM FIR MASK */
> case 0x1010c04: /* PIBAM FIR MASK */
> case 0x1010c05: /* PIBAM FIR MASK */
> - case 0x2020007: /* ADU stuff */
> - case 0x2020009: /* ADU stuff */
> - case 0x202000f: /* ADU stuff */
> + /* P9 xscom reset */
> + case 0x0090018: /* Receive status reg */
> + case 0x0090012: /* log register */
> + case 0x0090013: /* error register */
> +
> + /* P8 xscom reset */
> + case 0x2020007: /* ADU stuff, log register */
> + case 0x2020009: /* ADU stuff, error register */
> + case 0x202000f: /* ADU stuff, receive status register*/
> +
> + case 0x2013028: /* CAPP stuff */
> + case 0x201302a: /* CAPP stuff */
> + case 0x2013801: /* CAPP stuff */
> + case 0x2013802: /* CAPP stuff */
> return true;
> default:
> return false;
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2019-03-08 1:08 UTC|newest]
Thread overview: 33+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-07 22:35 [Qemu-devel] [PATCH v2 00/15] ppc: add POWER9 support to the PowerNV platform Cédric Le Goater
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 01/15] ppc/pnv: add a PSI bridge class model Cédric Le Goater
2019-03-07 23:57 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 02/15] ppc/pnv: add a PSI bridge model for POWER9 Cédric Le Goater
2019-03-07 23:58 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 03/15] ppc/pnv: lpc: fix OPB address ranges Cédric Le Goater
2019-03-07 23:59 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 04/15] ppc/pnv: add a LPC Controller class model Cédric Le Goater
2019-03-07 23:59 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 05/15] ppc/pnv: add a 'dt_isa_nodename' to the chip Cédric Le Goater
2019-03-08 0:01 ` David Gibson
2019-03-08 6:55 ` Cédric Le Goater
2019-03-08 11:08 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 06/15] ppc/pnv: add a LPC Controller model for POWER9 Cédric Le Goater
2019-03-08 0:28 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 07/15] ppc/pnv: add SerIRQ routing registers Cédric Le Goater
2019-03-08 0:28 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 08/15] ppc/pnv: add a OCC model class Cédric Le Goater
2019-03-08 0:29 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 09/15] ppc/pnv: add a OCC model for POWER9 Cédric Le Goater
2019-03-08 0:30 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 10/15] ppc/pnv: extend XSCOM core support " Cédric Le Goater
2019-03-08 0:31 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 11/15] ppc/pnv: POWER9 XSCOM quad support Cédric Le Goater
2019-03-08 0:32 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 12/15] ppc/pnv: activate XSCOM tests for POWER9 Cédric Le Goater
2019-03-08 0:33 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 13/15] ppc/pnv: add more dummy XSCOM addresses Cédric Le Goater
2019-03-08 0:56 ` David Gibson [this message]
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 14/15] ppc/pnv: add a "ibm, opal/power-mgt" device tree node on POWER9 Cédric Le Goater
2019-03-08 0:58 ` David Gibson
2019-03-07 22:35 ` [Qemu-devel] [PATCH v2 15/15] target/ppc: add HV support for POWER9 Cédric Le Goater
2019-03-08 0:59 ` David Gibson
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