From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH 06/26] target/hppa: Convert to CPUClass::tlb_fill
Date: Wed, 3 Apr 2019 10:43:38 +0700 [thread overview]
Message-ID: <20190403034358.21999-7-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190403034358.21999-1-richard.henderson@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/hppa/cpu.h | 8 ++++----
target/hppa/cpu.c | 5 ++---
target/hppa/mem_helper.c | 22 +++++++++++++++++-----
3 files changed, 23 insertions(+), 12 deletions(-)
diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h
index c062c7969c..e0e5d879e1 100644
--- a/target/hppa/cpu.h
+++ b/target/hppa/cpu.h
@@ -360,10 +360,10 @@ int hppa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
void hppa_cpu_do_interrupt(CPUState *cpu);
bool hppa_cpu_exec_interrupt(CPUState *cpu, int int_req);
void hppa_cpu_dump_state(CPUState *cs, FILE *f, fprintf_function, int);
-#ifdef CONFIG_USER_ONLY
-int hppa_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int size,
- int rw, int midx);
-#else
+bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+ MMUAccessType access_type, int mmu_idx,
+ bool probe, uintptr_t retaddr);
+#ifndef CONFIG_USER_ONLY
int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,
int type, hwaddr *pphys, int *pprot);
extern const MemoryRegionOps hppa_io_eir_ops;
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 00bf444620..46750980f7 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -167,9 +167,8 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb;
cc->gdb_read_register = hppa_cpu_gdb_read_register;
cc->gdb_write_register = hppa_cpu_gdb_write_register;
-#ifdef CONFIG_USER_ONLY
- cc->handle_mmu_fault = hppa_cpu_handle_mmu_fault;
-#else
+ cc->tlb_fill = hppa_cpu_tlb_fill;
+#ifndef CONFIG_USER_ONLY
cc->get_phys_page_debug = hppa_cpu_get_phys_page_debug;
dc->vmsd = &vmstate_hppa_cpu;
#endif
diff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c
index c9b57d07c3..f61b0fdb9f 100644
--- a/target/hppa/mem_helper.c
+++ b/target/hppa/mem_helper.c
@@ -25,8 +25,9 @@
#include "trace.h"
#ifdef CONFIG_USER_ONLY
-int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
- int size, int rw, int mmu_idx)
+bool hppa_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+ MMUAccessType access_type, int mmu_idx,
+ bool probe, uintptr_t retaddr)
{
HPPACPU *cpu = HPPA_CPU(cs);
@@ -34,7 +35,7 @@ int hppa_cpu_handle_mmu_fault(CPUState *cs, vaddr address,
which would affect si_code. */
cs->exception_index = EXCP_DMP;
cpu->env.cr[CR_IOR] = address;
- return 1;
+ cpu_loop_exit_restore(cs, retaddr);
}
#else
static hppa_tlb_entry *hppa_find_tlb(CPUHPPAState *env, vaddr addr)
@@ -214,8 +215,9 @@ hwaddr hppa_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
return excp == EXCP_DTLB_MISS ? -1 : phys;
}
-void tlb_fill(CPUState *cs, target_ulong addr, int size,
- MMUAccessType type, int mmu_idx, uintptr_t retaddr)
+bool hppa_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
+ MMUAccessType type, int mmu_idx,
+ bool probe, uintptr_t retaddr)
{
HPPACPU *cpu = HPPA_CPU(cs);
CPUHPPAState *env = &cpu->env;
@@ -237,6 +239,9 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,
excp = hppa_get_physical_address(env, addr, mmu_idx,
a_prot, &phys, &prot);
if (unlikely(excp >= 0)) {
+ if (probe) {
+ return false;
+ }
trace_hppa_tlb_fill_excp(env, addr, size, type, mmu_idx);
/* Failure. Raise the indicated exception. */
cs->exception_index = excp;
@@ -253,6 +258,13 @@ void tlb_fill(CPUState *cs, target_ulong addr, int size,
/* Success! Store the translation into the QEMU TLB. */
tlb_set_page(cs, addr & TARGET_PAGE_MASK, phys & TARGET_PAGE_MASK,
prot, mmu_idx, TARGET_PAGE_SIZE);
+ return true;
+}
+
+void tlb_fill(CPUState *cs, target_ulong addr, int size,
+ MMUAccessType type, int mmu_idx, uintptr_t retaddr)
+{
+ hppa_cpu_tlb_fill(cs, addr, size, type, mmu_idx, false, retaddr);
}
/* Insert (Insn/Data) TLB Address. Note this is PA 1.1 only. */
--
2.17.1
next prev parent reply other threads:[~2019-04-03 3:44 UTC|newest]
Thread overview: 100+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-03 3:43 [Qemu-devel] [PATCH 00/26] tcg: Add CPUClass::tlb_fill Richard Henderson
2019-04-03 3:43 ` [Qemu-devel] [PATCH 01/26] tcg: Assert h2g_valid for 32-bit guest on 64-bit host Richard Henderson
2019-04-03 4:59 ` Peter Maydell
2019-04-03 7:30 ` Richard Henderson
2019-04-03 3:43 ` [Qemu-devel] [PATCH 02/26] tcg: Add CPUClass::tlb_fill Richard Henderson
2019-04-29 17:25 ` Peter Maydell
2019-04-29 17:25 ` Peter Maydell
2019-05-08 5:58 ` Philippe Mathieu-Daudé
2019-04-03 3:43 ` [Qemu-devel] [PATCH 03/26] target/alpha: Convert to CPUClass::tlb_fill Richard Henderson
2019-04-29 17:47 ` Peter Maydell
2019-04-29 17:47 ` Peter Maydell
2019-05-08 6:09 ` Philippe Mathieu-Daudé
2019-04-03 3:43 ` [Qemu-devel] [PATCH 04/26] target/arm: " Richard Henderson
2019-04-03 5:14 ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2019-04-03 7:30 ` Richard Henderson
2019-04-30 12:02 ` Peter Maydell
2019-04-30 12:02 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 05/26] target/cris: " Richard Henderson
2019-04-30 11:57 ` Peter Maydell
2019-04-30 11:57 ` Peter Maydell
2019-04-03 3:43 ` Richard Henderson [this message]
2019-04-30 11:51 ` [Qemu-devel] [PATCH 06/26] target/hppa: " Peter Maydell
2019-04-30 11:51 ` Peter Maydell
2019-05-08 6:07 ` Philippe Mathieu-Daudé
2019-04-03 3:43 ` [Qemu-devel] [PATCH 07/26] target/i386: " Richard Henderson
2019-04-30 11:49 ` Peter Maydell
2019-04-30 11:49 ` Peter Maydell
2019-04-30 14:52 ` Richard Henderson
2019-04-30 14:52 ` Richard Henderson
2019-04-03 3:43 ` [Qemu-devel] [PATCH 08/26] target/lm32: " Richard Henderson
2019-04-30 11:45 ` Peter Maydell
2019-04-30 11:45 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 09/26] target/m68k: " Richard Henderson
2019-04-30 11:43 ` Peter Maydell
2019-04-30 11:43 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 10/26] target/microblaze: " Richard Henderson
2019-04-30 11:04 ` Peter Maydell
2019-04-30 11:04 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 11/26] target/mips: " Richard Henderson
2019-04-30 10:57 ` Peter Maydell
2019-04-30 10:57 ` Peter Maydell
2019-05-08 5:55 ` Philippe Mathieu-Daudé
2019-04-03 3:43 ` [Qemu-devel] [PATCH 12/26] target/moxie: " Richard Henderson
2019-04-30 10:47 ` Peter Maydell
2019-04-30 10:47 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 13/26] target/nios2: " Richard Henderson
2019-04-30 9:44 ` Peter Maydell
2019-04-30 9:44 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 14/26] target/openrisc: " Richard Henderson
2019-04-30 9:31 ` Peter Maydell
2019-04-30 9:31 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 15/26] target/ppc: " Richard Henderson
2019-04-30 9:35 ` Peter Maydell
2019-04-30 9:35 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 16/26] target/riscv: " Richard Henderson
2019-04-03 23:02 ` Alistair Francis
2019-04-03 3:43 ` [Qemu-devel] [PATCH 17/26] target/s390x: " Richard Henderson
2019-04-03 11:17 ` David Hildenbrand
2019-05-09 1:53 ` Richard Henderson
2019-04-03 3:43 ` [Qemu-devel] [PATCH 18/26] target/sh4: " Richard Henderson
2019-04-29 17:59 ` Peter Maydell
2019-04-29 17:59 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 19/26] target/sparc: " Richard Henderson
2019-04-03 4:36 ` Richard Henderson
2019-04-03 3:43 ` [Qemu-devel] [PATCH 20/26] target/tilegx: " Richard Henderson
2019-04-30 10:01 ` Peter Maydell
2019-04-30 10:01 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 21/26] target/tricore: " Richard Henderson
2019-04-30 10:03 ` Peter Maydell
2019-04-30 10:03 ` Peter Maydell
2019-04-03 3:43 ` [Qemu-devel] [PATCH 22/26] target/unicore32: " Richard Henderson
2019-04-30 10:06 ` Peter Maydell
2019-04-30 10:06 ` Peter Maydell
2019-05-08 4:27 ` Guan Xuetao
2019-04-03 3:43 ` [Qemu-devel] [PATCH 23/26] target/xtensa: " Richard Henderson
2019-04-30 10:11 ` Peter Maydell
2019-04-30 10:11 ` Peter Maydell
2019-04-30 17:32 ` Max Filippov
2019-04-30 17:32 ` Max Filippov
2019-04-30 17:44 ` Richard Henderson
2019-04-30 17:44 ` Richard Henderson
2019-04-30 18:14 ` Max Filippov
2019-04-30 18:14 ` Max Filippov
2019-04-30 21:07 ` Max Filippov
2019-04-30 21:07 ` Max Filippov
2019-05-09 0:47 ` Max Filippov
2019-04-03 3:43 ` [Qemu-devel] [PATCH 24/26] tcg: Use CPUClass::tlb_fill in cputlb.c Richard Henderson
2019-04-29 17:28 ` Peter Maydell
2019-04-29 17:28 ` Peter Maydell
2019-05-08 6:02 ` Philippe Mathieu-Daudé
2019-04-03 3:43 ` [Qemu-devel] [PATCH 25/26] tcg: Remove CPUClass::handle_mmu_fault Richard Henderson
2019-04-29 17:29 ` Peter Maydell
2019-04-29 17:29 ` Peter Maydell
2019-05-08 6:03 ` Philippe Mathieu-Daudé
2019-04-03 3:43 ` [Qemu-devel] [PATCH 26/26] tcg: Use tlb_fill probe from tlb_vaddr_to_host Richard Henderson
2019-04-29 17:41 ` Peter Maydell
2019-04-29 17:41 ` Peter Maydell
2019-05-09 5:24 ` Richard Henderson
2019-05-09 8:56 ` Peter Maydell
2019-05-09 22:24 ` Richard Henderson
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