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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Cc: Paolo Bonzini <pbonzini@redhat.com>,
	Eduardo Habkost <ehabkost@redhat.com>
Subject: [Qemu-devel] [PATCH 07/26] target/i386: Convert to CPUClass::tlb_fill
Date: Wed,  3 Apr 2019 10:43:39 +0700	[thread overview]
Message-ID: <20190403034358.21999-8-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190403034358.21999-1-richard.henderson@linaro.org>

We do not support probing, but we do not need it yet either.

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/i386/cpu.h         |  5 ++--
 target/i386/cpu.c         |  5 ++--
 target/i386/excp_helper.c | 61 +++++++++++++++++++++++++--------------
 target/i386/mem_helper.c  | 21 --------------
 4 files changed, 44 insertions(+), 48 deletions(-)

diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 83fb522554..1ce070ceb9 100644
--- a/target/i386/cpu.h
+++ b/target/i386/cpu.h
@@ -1655,8 +1655,9 @@ void host_cpuid(uint32_t function, uint32_t count,
 void host_vendor_fms(char *vendor, int *family, int *model, int *stepping);
 
 /* helper.c */
-int x86_cpu_handle_mmu_fault(CPUState *cpu, vaddr addr, int size,
-                             int is_write, int mmu_idx);
+bool x86_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
+                      MMUAccessType access_type, int mmu_idx,
+                      bool probe, uintptr_t retaddr);
 void x86_cpu_set_a20(X86CPU *cpu, int a20_state);
 
 #ifndef CONFIG_USER_ONLY
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index d6bb57d210..237bd88710 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -5866,9 +5866,8 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
     cc->gdb_write_register = x86_cpu_gdb_write_register;
     cc->get_arch_id = x86_cpu_get_arch_id;
     cc->get_paging_enabled = x86_cpu_get_paging_enabled;
-#ifdef CONFIG_USER_ONLY
-    cc->handle_mmu_fault = x86_cpu_handle_mmu_fault;
-#else
+    cc->tlb_fill = x86_cpu_tlb_fill;
+#ifndef CONFIG_USER_ONLY
     cc->asidx_from_attrs = x86_asidx_from_attrs;
     cc->get_memory_mapping = x86_cpu_get_memory_mapping;
     cc->get_phys_page_debug = x86_cpu_get_phys_page_debug;
diff --git a/target/i386/excp_helper.c b/target/i386/excp_helper.c
index 49231f6b69..6f59b7bafc 100644
--- a/target/i386/excp_helper.c
+++ b/target/i386/excp_helper.c
@@ -137,26 +137,7 @@ void raise_exception_ra(CPUX86State *env, int exception_index, uintptr_t retaddr
     raise_interrupt2(env, exception_index, 0, 0, 0, retaddr);
 }
 
-#if defined(CONFIG_USER_ONLY)
-int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size,
-                             int is_write, int mmu_idx)
-{
-    X86CPU *cpu = X86_CPU(cs);
-    CPUX86State *env = &cpu->env;
-
-    /* user mode only emulation */
-    is_write &= 1;
-    env->cr[2] = addr;
-    env->error_code = (is_write << PG_ERROR_W_BIT);
-    env->error_code |= PG_ERROR_U_MASK;
-    cs->exception_index = EXCP0E_PAGE;
-    env->exception_is_int = 0;
-    env->exception_next_eip = -1;
-    return 1;
-}
-
-#else
-
+#if !defined(CONFIG_USER_ONLY)
 static hwaddr get_hphys(CPUState *cs, hwaddr gphys, MMUAccessType access_type,
                         int *prot)
 {
@@ -365,8 +346,8 @@ static hwaddr get_hphys(CPUState *cs, hwaddr gphys, MMUAccessType access_type,
  * 0  = nothing more to do
  * 1  = generate PF fault
  */
-int x86_cpu_handle_mmu_fault(CPUState *cs, vaddr addr, int size,
-                             int is_write1, int mmu_idx)
+static int handle_mmu_fault(CPUState *cs, vaddr addr, int size,
+                            int is_write1, int mmu_idx)
 {
     X86CPU *cpu = X86_CPU(cs);
     CPUX86State *env = &cpu->env;
@@ -691,3 +672,39 @@ do_check_protect_pse36:
     return 1;
 }
 #endif
+
+bool x86_cpu_tlb_fill(CPUState *cs, vaddr addr, int size,
+                      MMUAccessType access_type, int mmu_idx,
+                      bool probe, uintptr_t retaddr)
+{
+    X86CPU *cpu = X86_CPU(cs);
+    CPUX86State *env = &cpu->env;
+
+#ifdef CONFIG_USER_ONLY
+    /* user mode only emulation */
+    env->cr[2] = addr;
+    env->error_code = (access_type == MMU_DATA_STORE) << PG_ERROR_W_BIT;
+    env->error_code |= PG_ERROR_U_MASK;
+    cs->exception_index = EXCP0E_PAGE;
+    env->exception_is_int = 0;
+    env->exception_next_eip = -1;
+    cpu_loop_exit_restore(cs, retaddr);
+#else
+    env->retaddr = retaddr;
+    if (handle_mmu_fault(cs, addr, size, access_type, mmu_idx)) {
+        /* FIXME: On error in get_hphys we have already jumpped out.  */
+        g_assert(!probe);
+        raise_exception_err_ra(env, cs->exception_index,
+                               env->error_code, retaddr);
+    }
+    return true;
+#endif
+}
+
+#if !defined(CONFIG_USER_ONLY)
+void tlb_fill(CPUState *cs, target_ulong addr, int size,
+              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
+{
+    x86_cpu_tlb_fill(cs, addr, size, access_type, mmu_idx, false, retaddr);
+}
+#endif
diff --git a/target/i386/mem_helper.c b/target/i386/mem_helper.c
index 6cc53bcb40..1885df29d2 100644
--- a/target/i386/mem_helper.c
+++ b/target/i386/mem_helper.c
@@ -191,24 +191,3 @@ void helper_boundl(CPUX86State *env, target_ulong a0, int v)
         raise_exception_ra(env, EXCP05_BOUND, GETPC());
     }
 }
-
-#if !defined(CONFIG_USER_ONLY)
-/* try to fill the TLB and return an exception if error. If retaddr is
- * NULL, it means that the function was called in C code (i.e. not
- * from generated code or from helper.c)
- */
-/* XXX: fix it to restore all registers */
-void tlb_fill(CPUState *cs, target_ulong addr, int size,
-              MMUAccessType access_type, int mmu_idx, uintptr_t retaddr)
-{
-    X86CPU *cpu = X86_CPU(cs);
-    CPUX86State *env = &cpu->env;
-    int ret;
-
-    env->retaddr = retaddr;
-    ret = x86_cpu_handle_mmu_fault(cs, addr, size, access_type, mmu_idx);
-    if (ret) {
-        raise_exception_err_ra(env, cs->exception_index, env->error_code, retaddr);
-    }
-}
-#endif
-- 
2.17.1

  parent reply	other threads:[~2019-04-03  3:44 UTC|newest]

Thread overview: 100+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-03  3:43 [Qemu-devel] [PATCH 00/26] tcg: Add CPUClass::tlb_fill Richard Henderson
2019-04-03  3:43 ` [Qemu-devel] [PATCH 01/26] tcg: Assert h2g_valid for 32-bit guest on 64-bit host Richard Henderson
2019-04-03  4:59   ` Peter Maydell
2019-04-03  7:30     ` Richard Henderson
2019-04-03  3:43 ` [Qemu-devel] [PATCH 02/26] tcg: Add CPUClass::tlb_fill Richard Henderson
2019-04-29 17:25   ` Peter Maydell
2019-04-29 17:25     ` Peter Maydell
2019-05-08  5:58     ` Philippe Mathieu-Daudé
2019-04-03  3:43 ` [Qemu-devel] [PATCH 03/26] target/alpha: Convert to CPUClass::tlb_fill Richard Henderson
2019-04-29 17:47   ` Peter Maydell
2019-04-29 17:47     ` Peter Maydell
2019-05-08  6:09   ` Philippe Mathieu-Daudé
2019-04-03  3:43 ` [Qemu-devel] [PATCH 04/26] target/arm: " Richard Henderson
2019-04-03  5:14   ` [Qemu-devel] [Qemu-arm] " Peter Maydell
2019-04-03  7:30     ` Richard Henderson
2019-04-30 12:02     ` Peter Maydell
2019-04-30 12:02       ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 05/26] target/cris: " Richard Henderson
2019-04-30 11:57   ` Peter Maydell
2019-04-30 11:57     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 06/26] target/hppa: " Richard Henderson
2019-04-30 11:51   ` Peter Maydell
2019-04-30 11:51     ` Peter Maydell
2019-05-08  6:07   ` Philippe Mathieu-Daudé
2019-04-03  3:43 ` Richard Henderson [this message]
2019-04-30 11:49   ` [Qemu-devel] [PATCH 07/26] target/i386: " Peter Maydell
2019-04-30 11:49     ` Peter Maydell
2019-04-30 14:52     ` Richard Henderson
2019-04-30 14:52       ` Richard Henderson
2019-04-03  3:43 ` [Qemu-devel] [PATCH 08/26] target/lm32: " Richard Henderson
2019-04-30 11:45   ` Peter Maydell
2019-04-30 11:45     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 09/26] target/m68k: " Richard Henderson
2019-04-30 11:43   ` Peter Maydell
2019-04-30 11:43     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 10/26] target/microblaze: " Richard Henderson
2019-04-30 11:04   ` Peter Maydell
2019-04-30 11:04     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 11/26] target/mips: " Richard Henderson
2019-04-30 10:57   ` Peter Maydell
2019-04-30 10:57     ` Peter Maydell
2019-05-08  5:55   ` Philippe Mathieu-Daudé
2019-04-03  3:43 ` [Qemu-devel] [PATCH 12/26] target/moxie: " Richard Henderson
2019-04-30 10:47   ` Peter Maydell
2019-04-30 10:47     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 13/26] target/nios2: " Richard Henderson
2019-04-30  9:44   ` Peter Maydell
2019-04-30  9:44     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 14/26] target/openrisc: " Richard Henderson
2019-04-30  9:31   ` Peter Maydell
2019-04-30  9:31     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 15/26] target/ppc: " Richard Henderson
2019-04-30  9:35   ` Peter Maydell
2019-04-30  9:35     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 16/26] target/riscv: " Richard Henderson
2019-04-03 23:02   ` Alistair Francis
2019-04-03  3:43 ` [Qemu-devel] [PATCH 17/26] target/s390x: " Richard Henderson
2019-04-03 11:17   ` David Hildenbrand
2019-05-09  1:53     ` Richard Henderson
2019-04-03  3:43 ` [Qemu-devel] [PATCH 18/26] target/sh4: " Richard Henderson
2019-04-29 17:59   ` Peter Maydell
2019-04-29 17:59     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 19/26] target/sparc: " Richard Henderson
2019-04-03  4:36   ` Richard Henderson
2019-04-03  3:43 ` [Qemu-devel] [PATCH 20/26] target/tilegx: " Richard Henderson
2019-04-30 10:01   ` Peter Maydell
2019-04-30 10:01     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 21/26] target/tricore: " Richard Henderson
2019-04-30 10:03   ` Peter Maydell
2019-04-30 10:03     ` Peter Maydell
2019-04-03  3:43 ` [Qemu-devel] [PATCH 22/26] target/unicore32: " Richard Henderson
2019-04-30 10:06   ` Peter Maydell
2019-04-30 10:06     ` Peter Maydell
2019-05-08  4:27     ` Guan Xuetao
2019-04-03  3:43 ` [Qemu-devel] [PATCH 23/26] target/xtensa: " Richard Henderson
2019-04-30 10:11   ` Peter Maydell
2019-04-30 10:11     ` Peter Maydell
2019-04-30 17:32     ` Max Filippov
2019-04-30 17:32       ` Max Filippov
2019-04-30 17:44       ` Richard Henderson
2019-04-30 17:44         ` Richard Henderson
2019-04-30 18:14         ` Max Filippov
2019-04-30 18:14           ` Max Filippov
2019-04-30 21:07           ` Max Filippov
2019-04-30 21:07             ` Max Filippov
2019-05-09  0:47             ` Max Filippov
2019-04-03  3:43 ` [Qemu-devel] [PATCH 24/26] tcg: Use CPUClass::tlb_fill in cputlb.c Richard Henderson
2019-04-29 17:28   ` Peter Maydell
2019-04-29 17:28     ` Peter Maydell
2019-05-08  6:02     ` Philippe Mathieu-Daudé
2019-04-03  3:43 ` [Qemu-devel] [PATCH 25/26] tcg: Remove CPUClass::handle_mmu_fault Richard Henderson
2019-04-29 17:29   ` Peter Maydell
2019-04-29 17:29     ` Peter Maydell
2019-05-08  6:03   ` Philippe Mathieu-Daudé
2019-04-03  3:43 ` [Qemu-devel] [PATCH 26/26] tcg: Use tlb_fill probe from tlb_vaddr_to_host Richard Henderson
2019-04-29 17:41   ` Peter Maydell
2019-04-29 17:41     ` Peter Maydell
2019-05-09  5:24     ` Richard Henderson
2019-05-09  8:56       ` Peter Maydell
2019-05-09 22:24         ` Richard Henderson

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