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From: Jules Irenge <jbi.octave@gmail.com>
To: amarkovic@wavecomp.com
Cc: aurelien@aurel32.net, qemu-devel@nongnu.org, arikalo@wavecomp.com
Subject: [Qemu-devel] [PATCH 4/5] target/mips: remove space to fix checkpatch errors
Date: Wed,  3 Apr 2019 13:50:54 +0100	[thread overview]
Message-ID: <20190403125055.26564-5-jbi.octave@gmail.com> (raw)
In-Reply-To: <20190403125055.26564-1-jbi.octave@gmail.com>

Remove space to fix errors issued by checkpatch.pl tool
"ERROR: space prohibited between function name and open parenthesis"
"ERROR: trailing white space"
 within "target/mips/cpu.h" file.

Signed-off-by: Jules Irenge <jbi.octave@gmail.com>
---
 target/mips/cpu.h | 10 +++++-----
 1 file changed, 5 insertions(+), 5 deletions(-)

diff --git a/target/mips/cpu.h b/target/mips/cpu.h
index c4278b3ffe..238a67c405 100644
--- a/target/mips/cpu.h
+++ b/target/mips/cpu.h
@@ -992,7 +992,7 @@ struct CPUMIPSState {
      * If translation is interrupted between the branch instruction and
      * the delay slot, record what type of branch it is so that we can
      * resume translation properly.  It might be possible to reduce
-     * this from three bits to two.  
+     * this from three bits to two.
      */
 #define MIPS_HFLAG_BMASK_BASE  0x803800
 #define MIPS_HFLAG_B      0x00800 /* Unconditional branch               */
@@ -1072,7 +1072,7 @@ static inline MIPSCPU *mips_env_get_cpu(CPUMIPSState *env)
 
 #define ENV_OFFSET offsetof(MIPSCPU, env)
 
-void mips_cpu_list (FILE *f, fprintf_function cpu_fprintf);
+void mips_cpu_list(FILE *f, fprintf_function cpu_fprintf);
 
 #define cpu_signal_handler cpu_mips_signal_handler
 #define cpu_list mips_cpu_list
@@ -1099,14 +1099,14 @@ static inline int hflags_mmu_index(uint32_t hflags)
     }
 }
 
-static inline int cpu_mmu_index (CPUMIPSState *env, bool ifetch)
+static inline int cpu_mmu_index(CPUMIPSState *env, bool ifetch)
 {
     return hflags_mmu_index(env->hflags);
 }
 
 #include "exec/cpu-all.h"
 
-/* 
+/*
  * Memory access type :
  * may be needed for precise access rights control and precise exceptions.
  */
@@ -1192,7 +1192,7 @@ void cpu_mips_soft_irq(CPUMIPSState *env, int irq, int level);
 void itc_reconfigure(struct MIPSITUState *tag);
 
 /* helper.c */
-target_ulong exception_resume_pc (CPUMIPSState *env);
+target_ulong exception_resume_pc(CPUMIPSState *env);
 
 static inline void restore_snan_bit_mode(CPUMIPSState *env)
 {
-- 
2.20.1

  parent reply	other threads:[~2019-04-03 12:51 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-04-03 12:50 [Qemu-devel] [PATCH 0/5] target/mips/cpu: errors and warnings coding style cleanup Jules Irenge
2019-04-03 12:50 ` [Qemu-devel] [PATCH 1/5] target/mips: add space to fix checkpatch errors Jules Irenge
2019-04-03 14:05   ` Aleksandar Markovic
2019-04-03 12:50 ` [Qemu-devel] [PATCH 2/5] target/mips: realign comments to fix checkpatch warnings Jules Irenge
2019-04-03 14:08   ` Aleksandar Markovic
2019-04-03 12:50 ` [Qemu-devel] [PATCH 3/5] target/mips: replace indentation with space to fix checkpatch errors Jules Irenge
2019-04-03 14:12   ` Aleksandar Markovic
2019-04-03 12:50 ` Jules Irenge [this message]
2019-04-03 12:50 ` [Qemu-devel] [PATCH 5/5] target/mips: wrap line into multiple lines to " Jules Irenge
2019-04-03 13:17 ` [Qemu-devel] [PATCH 0/5] target/mips/cpu: errors and warnings coding style cleanup no-reply
2019-04-03 14:19 ` Aleksandar Markovic

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