From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: qemu-devel@nongnu.org, Thomas Huth <thuth@redhat.com>
Cc: "Aurelien Jarno" <aurelien@aurel32.net>,
"Michael S. Tsirkin" <mst@redhat.com>,
"Aleksandar Markovic" <amarkovic@wavecomp.com>,
"Aleksandar Rikalo" <arikalo@wavecomp.com>,
"Paolo Bonzini" <pbonzini@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: [Qemu-devel] [PATCH for-4.1 2/4] hw/isa/superio: Support more than one IDE bus
Date: Fri, 5 Apr 2019 00:12:36 +0200 [thread overview]
Message-ID: <20190404221238.12468-3-philmd@redhat.com> (raw)
In-Reply-To: <20190404221238.12468-1-philmd@redhat.com>
The current code is limited to a single IDE bus (supporting
two IDE drives). Some Super I/O chipset provide two IDE buses
(four IDE drives).
Modify the model to support more that one IDE bus.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/isa/isa-superio.c | 43 ++++++++++++++++++++++------------------
include/hw/isa/superio.h | 2 +-
2 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/hw/isa/isa-superio.c b/hw/isa/isa-superio.c
index c6845eaf578..b0761ea1f96 100644
--- a/hw/isa/isa-superio.c
+++ b/hw/isa/isa-superio.c
@@ -18,6 +18,7 @@
#include "hw/isa/superio.h"
#include "hw/input/i8042.h"
#include "hw/char/serial.h"
+#include "hw/ide.h"
#include "trace.h"
static void isa_superio_realize(DeviceState *dev, Error **errp)
@@ -30,7 +31,7 @@ static void isa_superio_realize(DeviceState *dev, Error **errp)
Chardev *chr;
DriveInfo *drive;
char *name;
- int i;
+ int i, j;
/* Parallel port */
for (i = 0; i < k->parallel.count; i++) {
@@ -146,25 +147,29 @@ static void isa_superio_realize(DeviceState *dev, Error **errp)
s->kbc = isa_create_simple(bus, TYPE_I8042);
/* IDE */
- if (k->ide.count && (!k->ide.is_enabled || k->ide.is_enabled(s, 0))) {
- isa = isa_create(bus, "isa-ide");
- d = DEVICE(isa);
- if (k->ide.get_iobase) {
- qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(s, 0));
- }
- if (k->ide.get_iobase) {
- qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(s, 1));
- }
- if (k->ide.get_irq) {
- qdev_prop_set_uint32(d, "irq", k->ide.get_irq(s, 0));
+ size_t bus_count = k->ide.count / MAX_IDE_DEVS;
+ s->ide = g_new(ISADevice *, bus_count);
+ for (i = 0, j = 0; i < bus_count; i++, j += MAX_IDE_DEVS) {
+ if (!k->ide.is_enabled || k->ide.is_enabled(s, j)) {
+ isa = isa_create(bus, "isa-ide");
+ d = DEVICE(isa);
+ if (k->ide.get_iobase) {
+ qdev_prop_set_uint32(d, "iobase", k->ide.get_iobase(s, j));
+ }
+ if (k->ide.get_iobase) {
+ qdev_prop_set_uint32(d, "iobase2", k->ide.get_iobase(s, j + 1));
+ }
+ if (k->ide.get_irq) {
+ qdev_prop_set_uint32(d, "irq", k->ide.get_irq(s, j));
+ }
+ qdev_init_nofail(d);
+ s->ide[i] = isa;
+ trace_superio_create_ide(i,
+ k->ide.get_iobase ?
+ k->ide.get_iobase(s, j) : -1,
+ k->ide.get_irq ?
+ k->ide.get_irq(s, j) : -1);
}
- qdev_init_nofail(d);
- s->ide = isa;
- trace_superio_create_ide(0,
- k->ide.get_iobase ?
- k->ide.get_iobase(s, 0) : -1,
- k->ide.get_irq ?
- k->ide.get_irq(s, 0) : -1);
}
}
diff --git a/include/hw/isa/superio.h b/include/hw/isa/superio.h
index 345f0060817..980a9691696 100644
--- a/include/hw/isa/superio.h
+++ b/include/hw/isa/superio.h
@@ -33,7 +33,7 @@ typedef struct ISASuperIODevice {
ISADevice *serial[SUPERIO_MAX_SERIAL_PORTS];
ISADevice *floppy;
ISADevice *kbc;
- ISADevice *ide;
+ ISADevice **ide;
} ISASuperIODevice;
typedef struct ISASuperIOFuncs {
--
2.20.1
next prev parent reply other threads:[~2019-04-04 22:13 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-04-04 22:12 [Qemu-devel] [PATCH for-4.1 0/4] hw/mips/r4k: Refactor the Super I/O chipset Philippe Mathieu-Daudé
2019-04-04 22:12 ` [Qemu-devel] [PATCH for-4.1 1/4] hw/isa/superio: Rename a variable Philippe Mathieu-Daudé
2019-04-05 4:14 ` Thomas Huth
2019-04-05 4:14 ` Thomas Huth
2019-04-05 9:32 ` Philippe Mathieu-Daudé
2019-04-05 9:32 ` Philippe Mathieu-Daudé
2019-04-04 22:12 ` Philippe Mathieu-Daudé [this message]
2019-04-04 22:12 ` [Qemu-devel] [PATCH for-4.1 3/4] hw/isa/superio: Support chipsets with no Floppy Disk controller Philippe Mathieu-Daudé
2019-04-05 4:24 ` Thomas Huth
2019-04-05 4:24 ` Thomas Huth
2019-04-04 22:12 ` [Qemu-devel] [PATCH for-4.1 4/4] hw/mips/r4k: Refactor the Super I/O chipset Philippe Mathieu-Daudé
2019-04-05 4:51 ` Thomas Huth
2019-04-05 4:51 ` Thomas Huth
2019-04-05 9:49 ` Philippe Mathieu-Daudé
2019-04-05 9:49 ` Philippe Mathieu-Daudé
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190404221238.12468-3-philmd@redhat.com \
--to=philmd@redhat.com \
--cc=amarkovic@wavecomp.com \
--cc=arikalo@wavecomp.com \
--cc=aurelien@aurel32.net \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=thuth@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).