From: Igor Mammedov <imammedo@redhat.com> To: Alistair Francis <Alistair.Francis@wdc.com> Cc: "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, "qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>, "alistair23@gmail.com" <alistair23@gmail.com>, "palmer@sifive.com" <palmer@sifive.com>, "ijc@hellion.org.uk" <ijc@hellion.org.uk> Subject: Re: [Qemu-devel] [PATCH for 4.1 v3 4/6] riscv: virt: Allow specifying a CPU via commandline Date: Thu, 11 Apr 2019 13:53:38 +0200 [thread overview] Message-ID: <20190411135338.535472e2@redhat.com> (raw) In-Reply-To: <a832ae5e252c58c1ac4dd99d7d164fdb0de70f10.1554937288.git.alistair.francis@wdc.com> On Wed, 10 Apr 2019 23:10:42 +0000 Alistair Francis <Alistair.Francis@wdc.com> wrote: > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> > --- > hw/riscv/virt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index fc4c6b306e..5b25f028ad 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -400,7 +400,7 @@ static void riscv_virt_board_init(MachineState *machine) > /* Initialize SOC */ > object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > TYPE_RISCV_HART_ARRAY, &error_abort, NULL); > - object_property_set_str(OBJECT(&s->soc), VIRT_CPU, "cpu-type", > + object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", > &error_abort); > object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", > &error_abort); > @@ -526,6 +526,7 @@ static void riscv_virt_board_machine_init(MachineClass *mc) > mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)"; > mc->init = riscv_virt_board_init; > mc->max_cpus = 8; /* hardcoded limit in BBL */ > + mc->default_cpu_type = VIRT_CPU; > } > > DEFINE_MACHINE("virt", riscv_virt_board_machine_init)
WARNING: multiple messages have this Message-ID (diff)
From: Igor Mammedov <imammedo@redhat.com> To: Alistair Francis <Alistair.Francis@wdc.com> Cc: "alistair23@gmail.com" <alistair23@gmail.com>, "palmer@sifive.com" <palmer@sifive.com>, "qemu-riscv@nongnu.org" <qemu-riscv@nongnu.org>, "qemu-devel@nongnu.org" <qemu-devel@nongnu.org>, "ijc@hellion.org.uk" <ijc@hellion.org.uk> Subject: Re: [Qemu-devel] [PATCH for 4.1 v3 4/6] riscv: virt: Allow specifying a CPU via commandline Date: Thu, 11 Apr 2019 13:53:38 +0200 [thread overview] Message-ID: <20190411135338.535472e2@redhat.com> (raw) Message-ID: <20190411115338.uv-gdpMZBFYNM24UsR6G9szTq9CFS7m040dNPFrjlXE@z> (raw) In-Reply-To: <a832ae5e252c58c1ac4dd99d7d164fdb0de70f10.1554937288.git.alistair.francis@wdc.com> On Wed, 10 Apr 2019 23:10:42 +0000 Alistair Francis <Alistair.Francis@wdc.com> wrote: > Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> > --- > hw/riscv/virt.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c > index fc4c6b306e..5b25f028ad 100644 > --- a/hw/riscv/virt.c > +++ b/hw/riscv/virt.c > @@ -400,7 +400,7 @@ static void riscv_virt_board_init(MachineState *machine) > /* Initialize SOC */ > object_initialize_child(OBJECT(machine), "soc", &s->soc, sizeof(s->soc), > TYPE_RISCV_HART_ARRAY, &error_abort, NULL); > - object_property_set_str(OBJECT(&s->soc), VIRT_CPU, "cpu-type", > + object_property_set_str(OBJECT(&s->soc), machine->cpu_type, "cpu-type", > &error_abort); > object_property_set_int(OBJECT(&s->soc), smp_cpus, "num-harts", > &error_abort); > @@ -526,6 +526,7 @@ static void riscv_virt_board_machine_init(MachineClass *mc) > mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)"; > mc->init = riscv_virt_board_init; > mc->max_cpus = 8; /* hardcoded limit in BBL */ > + mc->default_cpu_type = VIRT_CPU; > } > > DEFINE_MACHINE("virt", riscv_virt_board_machine_init)
next prev parent reply other threads:[~2019-04-11 11:53 UTC|newest] Thread overview: 46+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-04-10 23:10 [Qemu-devel] [PATCH for 4.1 v3 0/6] RISC-V: Allow specifying CPU ISA via command line Alistair Francis 2019-04-10 23:10 ` Alistair Francis 2019-04-10 23:10 ` [Qemu-devel] [PATCH for 4.1 v3 1/6] linux-user/riscv: Add the CPU type as a comment Alistair Francis 2019-04-10 23:10 ` Alistair Francis 2019-04-10 23:10 ` [Qemu-devel] [PATCH for 4.1 v3 2/6] target/riscv: Fall back to generating a RISC-V CPU Alistair Francis 2019-04-10 23:10 ` Alistair Francis 2019-04-11 12:18 ` Igor Mammedov 2019-04-11 12:18 ` Igor Mammedov 2019-04-11 20:42 ` Alistair Francis 2019-04-11 20:42 ` Alistair Francis 2019-04-12 8:35 ` Igor Mammedov 2019-04-12 8:35 ` Igor Mammedov 2019-04-12 21:19 ` Alistair Francis 2019-04-12 21:19 ` Alistair Francis 2019-04-15 8:38 ` Igor Mammedov 2019-04-15 8:38 ` Igor Mammedov 2019-04-15 23:56 ` Alistair Francis 2019-04-15 23:56 ` Alistair Francis 2019-04-16 12:19 ` Igor Mammedov 2019-04-16 12:19 ` Igor Mammedov 2019-04-16 13:23 ` Daniel P. Berrangé 2019-04-16 13:23 ` Daniel P. Berrangé 2019-04-19 20:55 ` Alistair Francis 2019-04-19 20:55 ` Alistair Francis 2019-04-10 23:10 ` [Qemu-devel] [PATCH for 4.1 v3 3/6] target/riscv: Create settable CPU properties Alistair Francis 2019-04-10 23:10 ` Alistair Francis 2019-04-10 23:10 ` [Qemu-devel] [PATCH for 4.1 v3 4/6] riscv: virt: Allow specifying a CPU via commandline Alistair Francis 2019-04-10 23:10 ` Alistair Francis 2019-04-11 11:53 ` Igor Mammedov [this message] 2019-04-11 11:53 ` Igor Mammedov 2019-04-10 23:10 ` [Qemu-devel] [PATCH for 4.1 v3 5/6] target/riscv: Remove the generic no MMU CPUs Alistair Francis 2019-04-10 23:10 ` Alistair Francis 2019-04-10 23:11 ` [Qemu-devel] [PATCH for 4.1 v3 6/6] riscv: Add a generic spike machine Alistair Francis 2019-04-10 23:11 ` Alistair Francis 2019-04-11 12:06 ` Igor Mammedov 2019-04-11 12:06 ` Igor Mammedov 2019-04-11 12:18 ` Peter Maydell 2019-04-11 12:18 ` Peter Maydell 2019-04-11 20:35 ` Alistair Francis 2019-04-11 20:35 ` Alistair Francis 2019-04-12 7:46 ` Ian Campbell 2019-04-12 7:46 ` Ian Campbell 2019-04-11 20:34 ` Alistair Francis 2019-04-11 20:34 ` Alistair Francis 2019-04-12 8:38 ` Igor Mammedov 2019-04-12 8:38 ` Igor Mammedov
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