* [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
@ 2019-04-19 6:14 Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
` (8 more replies)
0 siblings, 9 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Igor Mammedov
This series adds a new CPUClass::class_name_format field, which
allows us to delete 16 of the 21 *_cpu_class_by_name() functions
that exist today.
Eduardo Habkost (7):
cpu: Change return type of cpu_class_by_name() to CPUClass
riscv: Don't split CPU model string
arm: Don't split CPU model string
arm: Remove special case for "any" CPU model
cpu: Let architectures set CPU class name format
cpu: Set class name format for some architectures
cpu: Set fixed class name on some architectures
include/qom/cpu.h | 14 +++++++++++++-
target/s390x/internal.h | 1 -
exec.c | 8 +++-----
qom/cpu.c | 20 +++++++++++++++++---
target/arm/cpu.c | 30 +-----------------------------
target/hppa/cpu.c | 8 ++------
target/i386/cpu.c | 11 +----------
target/lm32/cpu.c | 17 +----------------
target/m68k/cpu.c | 17 +----------------
target/microblaze/cpu.c | 8 ++------
target/mips/cpu.c | 13 +------------
target/moxie/cpu.c | 17 +----------------
target/nios2/cpu.c | 8 ++------
target/openrisc/cpu.c | 17 +----------------
target/riscv/cpu.c | 20 +-------------------
target/s390x/cpu.c | 2 +-
target/s390x/cpu_models.c | 20 +++++---------------
target/tilegx/cpu.c | 8 ++------
target/tricore/cpu.c | 17 +----------------
target/unicore32/cpu.c | 17 +----------------
target/xtensa/cpu.c | 17 +----------------
21 files changed, 58 insertions(+), 232 deletions(-)
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 1/7] cpu: Change return type of cpu_class_by_name() to CPUClass Eduardo Habkost
` (7 subsequent siblings)
8 siblings, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Richard Henderson
This series adds a new CPUClass::class_name_format field, which
allows us to delete 16 of the 21 *_cpu_class_by_name() functions
that exist today.
Eduardo Habkost (7):
cpu: Change return type of cpu_class_by_name() to CPUClass
riscv: Don't split CPU model string
arm: Don't split CPU model string
arm: Remove special case for "any" CPU model
cpu: Let architectures set CPU class name format
cpu: Set class name format for some architectures
cpu: Set fixed class name on some architectures
include/qom/cpu.h | 14 +++++++++++++-
target/s390x/internal.h | 1 -
exec.c | 8 +++-----
qom/cpu.c | 20 +++++++++++++++++---
target/arm/cpu.c | 30 +-----------------------------
target/hppa/cpu.c | 8 ++------
target/i386/cpu.c | 11 +----------
target/lm32/cpu.c | 17 +----------------
target/m68k/cpu.c | 17 +----------------
target/microblaze/cpu.c | 8 ++------
target/mips/cpu.c | 13 +------------
target/moxie/cpu.c | 17 +----------------
target/nios2/cpu.c | 8 ++------
target/openrisc/cpu.c | 17 +----------------
target/riscv/cpu.c | 20 +-------------------
target/s390x/cpu.c | 2 +-
target/s390x/cpu_models.c | 20 +++++---------------
target/tilegx/cpu.c | 8 ++------
target/tricore/cpu.c | 17 +----------------
target/unicore32/cpu.c | 17 +----------------
target/xtensa/cpu.c | 17 +----------------
21 files changed, 58 insertions(+), 232 deletions(-)
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 1/7] cpu: Change return type of cpu_class_by_name() to CPUClass
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string Eduardo Habkost
` (6 subsequent siblings)
8 siblings, 1 reply; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, Igor Mammedov, Cornelia Huck,
David Hildenbrand, qemu-s390x, Markus Armbruster
The function always returns a CPU class. Change the return type
to reflect that.
I'm not changing the return type of CPUClass::class_by_name()
yet, because many of its implementations will be eliminated by
the next commits.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Cornelia Huck <cohuck@redhat.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: qemu-s390x@nongnu.org
Cc: Markus Armbruster <armbru@redhat.com>
---
include/qom/cpu.h | 2 +-
exec.c | 8 +++-----
qom/cpu.c | 4 ++--
target/s390x/cpu_models.c | 10 +++++-----
4 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index d28c690b27..fefd5c26b0 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -676,7 +676,7 @@ void cpu_reset(CPUState *cpu);
*
* Returns: A #CPUClass or %NULL if not matching class is found.
*/
-ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
+CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model);
/**
* cpu_create:
diff --git a/exec.c b/exec.c
index efb1616ece..d303ac5f25 100644
--- a/exec.c
+++ b/exec.c
@@ -984,7 +984,6 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
const char *parse_cpu_option(const char *cpu_option)
{
- ObjectClass *oc;
CPUClass *cc;
gchar **model_pieces;
const char *cpu_type;
@@ -995,15 +994,14 @@ const char *parse_cpu_option(const char *cpu_option)
exit(1);
}
- oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
- if (oc == NULL) {
+ cc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
+ if (cc == NULL) {
error_report("unable to find CPU model '%s'", model_pieces[0]);
g_strfreev(model_pieces);
exit(EXIT_FAILURE);
}
- cpu_type = object_class_get_name(oc);
- cc = CPU_CLASS(oc);
+ cpu_type = object_class_get_name(OBJECT_CLASS(cc));
cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
g_strfreev(model_pieces);
return cpu_type;
diff --git a/qom/cpu.c b/qom/cpu.c
index a8d2958956..b971a56242 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -283,12 +283,12 @@ static bool cpu_common_has_work(CPUState *cs)
return false;
}
-ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
+CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model)
{
CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
assert(cpu_model && cc->class_by_name);
- return cc->class_by_name(cpu_model);
+ return CPU_CLASS(cc->class_by_name(cpu_model));
}
static void cpu_common_parse_features(const char *typename, char *features,
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index eb125d4d0d..391698595f 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -482,7 +482,7 @@ static void cpu_model_from_info(S390CPUModel *model, const CpuModelInfo *info,
const QDict *qdict = NULL;
const QDictEntry *e;
Visitor *visitor;
- ObjectClass *oc;
+ CPUClass *cc;
S390CPU *cpu;
Object *obj;
@@ -494,16 +494,16 @@ static void cpu_model_from_info(S390CPUModel *model, const CpuModelInfo *info,
}
}
- oc = cpu_class_by_name(TYPE_S390_CPU, info->name);
- if (!oc) {
+ cc = cpu_class_by_name(TYPE_S390_CPU, info->name);
+ if (!cc) {
error_setg(errp, "The CPU definition \'%s\' is unknown.", info->name);
return;
}
- if (S390_CPU_CLASS(oc)->kvm_required && !kvm_enabled()) {
+ if (S390_CPU_CLASS(cc)->kvm_required && !kvm_enabled()) {
error_setg(errp, "The CPU definition '%s' requires KVM", info->name);
return;
}
- obj = object_new(object_class_get_name(oc));
+ obj = object_new(object_class_get_name(OBJECT_CLASS(cc)));
cpu = S390_CPU(obj);
if (!cpu->model) {
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 1/7] cpu: Change return type of cpu_class_by_name() to CPUClass
2019-04-19 6:14 ` [Qemu-devel] [PATCH 1/7] cpu: Change return type of cpu_class_by_name() to CPUClass Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
0 siblings, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, David Hildenbrand, Cornelia Huck,
Markus Armbruster, qemu-s390x, Igor Mammedov, Richard Henderson
The function always returns a CPU class. Change the return type
to reflect that.
I'm not changing the return type of CPUClass::class_by_name()
yet, because many of its implementations will be eliminated by
the next commits.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Cornelia Huck <cohuck@redhat.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: qemu-s390x@nongnu.org
Cc: Markus Armbruster <armbru@redhat.com>
---
include/qom/cpu.h | 2 +-
exec.c | 8 +++-----
qom/cpu.c | 4 ++--
target/s390x/cpu_models.c | 10 +++++-----
4 files changed, 11 insertions(+), 13 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index d28c690b27..fefd5c26b0 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -676,7 +676,7 @@ void cpu_reset(CPUState *cpu);
*
* Returns: A #CPUClass or %NULL if not matching class is found.
*/
-ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model);
+CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model);
/**
* cpu_create:
diff --git a/exec.c b/exec.c
index efb1616ece..d303ac5f25 100644
--- a/exec.c
+++ b/exec.c
@@ -984,7 +984,6 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp)
const char *parse_cpu_option(const char *cpu_option)
{
- ObjectClass *oc;
CPUClass *cc;
gchar **model_pieces;
const char *cpu_type;
@@ -995,15 +994,14 @@ const char *parse_cpu_option(const char *cpu_option)
exit(1);
}
- oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
- if (oc == NULL) {
+ cc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
+ if (cc == NULL) {
error_report("unable to find CPU model '%s'", model_pieces[0]);
g_strfreev(model_pieces);
exit(EXIT_FAILURE);
}
- cpu_type = object_class_get_name(oc);
- cc = CPU_CLASS(oc);
+ cpu_type = object_class_get_name(OBJECT_CLASS(cc));
cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
g_strfreev(model_pieces);
return cpu_type;
diff --git a/qom/cpu.c b/qom/cpu.c
index a8d2958956..b971a56242 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -283,12 +283,12 @@ static bool cpu_common_has_work(CPUState *cs)
return false;
}
-ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
+CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model)
{
CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
assert(cpu_model && cc->class_by_name);
- return cc->class_by_name(cpu_model);
+ return CPU_CLASS(cc->class_by_name(cpu_model));
}
static void cpu_common_parse_features(const char *typename, char *features,
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index eb125d4d0d..391698595f 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -482,7 +482,7 @@ static void cpu_model_from_info(S390CPUModel *model, const CpuModelInfo *info,
const QDict *qdict = NULL;
const QDictEntry *e;
Visitor *visitor;
- ObjectClass *oc;
+ CPUClass *cc;
S390CPU *cpu;
Object *obj;
@@ -494,16 +494,16 @@ static void cpu_model_from_info(S390CPUModel *model, const CpuModelInfo *info,
}
}
- oc = cpu_class_by_name(TYPE_S390_CPU, info->name);
- if (!oc) {
+ cc = cpu_class_by_name(TYPE_S390_CPU, info->name);
+ if (!cc) {
error_setg(errp, "The CPU definition \'%s\' is unknown.", info->name);
return;
}
- if (S390_CPU_CLASS(oc)->kvm_required && !kvm_enabled()) {
+ if (S390_CPU_CLASS(cc)->kvm_required && !kvm_enabled()) {
error_setg(errp, "The CPU definition '%s' requires KVM", info->name);
return;
}
- obj = object_new(object_class_get_name(oc));
+ obj = object_new(object_class_get_name(OBJECT_CLASS(cc)));
cpu = S390_CPU(obj);
if (!cpu->model) {
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 1/7] cpu: Change return type of cpu_class_by_name() to CPUClass Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 21:00 ` Alistair Francis
2019-04-19 6:14 ` [Qemu-devel] [PATCH 3/7] arm: " Eduardo Habkost
` (5 subsequent siblings)
8 siblings, 2 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, Igor Mammedov, Palmer Dabbelt,
Alistair Francis, Sagar Karandikar, Bastian Koppelmann,
qemu-riscv
CPUClass::class_by_name is called after the CPU model name and
options were already split, there's no need to split the string
again.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: qemu-riscv@nongnu.org
---
target/riscv/cpu.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d61bce6d55..5e97a83c80 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -179,12 +179,9 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
char *typename;
- char **cpuname;
- cpuname = g_strsplit(cpu_model, ",", 1);
- typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpuname[0]);
+ typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
- g_strfreev(cpuname);
g_free(typename);
if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
object_class_is_abstract(oc)) {
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string
2019-04-19 6:14 ` [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 21:00 ` Alistair Francis
1 sibling, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, qemu-riscv, Sagar Karandikar, Bastian Koppelmann,
Palmer Dabbelt, Alistair Francis, Igor Mammedov,
Richard Henderson
CPUClass::class_by_name is called after the CPU model name and
options were already split, there's no need to split the string
again.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: qemu-riscv@nongnu.org
---
target/riscv/cpu.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index d61bce6d55..5e97a83c80 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -179,12 +179,9 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
char *typename;
- char **cpuname;
- cpuname = g_strsplit(cpu_model, ",", 1);
- typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpuname[0]);
+ typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
- g_strfreev(cpuname);
g_free(typename);
if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
object_class_is_abstract(oc)) {
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 3/7] arm: Don't split CPU model string
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
` (2 preceding siblings ...)
2019-04-19 6:14 ` [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 4/7] arm: Remove special case for "any" CPU model Eduardo Habkost
` (4 subsequent siblings)
8 siblings, 1 reply; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, Igor Mammedov, Greg Bellows,
qemu-arm
CPUClass::class_by_name is called after the CPU model name and
options were already split, there's no need to split the string
again.
Fixes: fb8d6c24b095 ("target-arm: Add CPU property to disable AArch64")
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Greg Bellows <greg.bellows@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
---
target/arm/cpu.c | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 4155782197..6848d9c94d 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1212,22 +1212,17 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
char *typename;
- char **cpuname;
- const char *cpunamestr;
- cpuname = g_strsplit(cpu_model, ",", 1);
- cpunamestr = cpuname[0];
#ifdef CONFIG_USER_ONLY
/* For backwards compatibility usermode emulation allows "-cpu any",
* which has the same semantics as "-cpu max".
*/
- if (!strcmp(cpunamestr, "any")) {
- cpunamestr = "max";
+ if (!strcmp(cpu_model, "any")) {
+ cpu_model = "max";
}
#endif
- typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpunamestr);
+ typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
- g_strfreev(cpuname);
g_free(typename);
if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
object_class_is_abstract(oc)) {
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 3/7] arm: Don't split CPU model string
2019-04-19 6:14 ` [Qemu-devel] [PATCH 3/7] arm: " Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
0 siblings, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Igor Mammedov, Greg Bellows, qemu-arm,
Richard Henderson
CPUClass::class_by_name is called after the CPU model name and
options were already split, there's no need to split the string
again.
Fixes: fb8d6c24b095 ("target-arm: Add CPU property to disable AArch64")
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Greg Bellows <greg.bellows@linaro.org>
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
---
target/arm/cpu.c | 11 +++--------
1 file changed, 3 insertions(+), 8 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 4155782197..6848d9c94d 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1212,22 +1212,17 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
{
ObjectClass *oc;
char *typename;
- char **cpuname;
- const char *cpunamestr;
- cpuname = g_strsplit(cpu_model, ",", 1);
- cpunamestr = cpuname[0];
#ifdef CONFIG_USER_ONLY
/* For backwards compatibility usermode emulation allows "-cpu any",
* which has the same semantics as "-cpu max".
*/
- if (!strcmp(cpunamestr, "any")) {
- cpunamestr = "max";
+ if (!strcmp(cpu_model, "any")) {
+ cpu_model = "max";
}
#endif
- typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpunamestr);
+ typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
- g_strfreev(cpuname);
g_free(typename);
if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
object_class_is_abstract(oc)) {
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 4/7] arm: Remove special case for "any" CPU model
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
` (3 preceding siblings ...)
2019-04-19 6:14 ` [Qemu-devel] [PATCH 3/7] arm: " Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format Eduardo Habkost
` (3 subsequent siblings)
8 siblings, 1 reply; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Igor Mammedov, qemu-arm
We already have an entry for "any" at arm_cpus[], which makes a
"any-arm-cpu" QOM type be registered. This means the regular QOM
type name lookup code already works and there's no need for a
special case.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
---
target/arm/cpu.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 6848d9c94d..dcc65093d9 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1213,14 +1213,6 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
ObjectClass *oc;
char *typename;
-#ifdef CONFIG_USER_ONLY
- /* For backwards compatibility usermode emulation allows "-cpu any",
- * which has the same semantics as "-cpu max".
- */
- if (!strcmp(cpu_model, "any")) {
- cpu_model = "max";
- }
-#endif
typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 4/7] arm: Remove special case for "any" CPU model
2019-04-19 6:14 ` [Qemu-devel] [PATCH 4/7] arm: Remove special case for "any" CPU model Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
0 siblings, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, qemu-arm, Richard Henderson
We already have an entry for "any" at arm_cpus[], which makes a
"any-arm-cpu" QOM type be registered. This means the regular QOM
type name lookup code already works and there's no need for a
special case.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-arm@nongnu.org
---
target/arm/cpu.c | 8 --------
1 file changed, 8 deletions(-)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 6848d9c94d..dcc65093d9 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1213,14 +1213,6 @@ static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
ObjectClass *oc;
char *typename;
-#ifdef CONFIG_USER_ONLY
- /* For backwards compatibility usermode emulation allows "-cpu any",
- * which has the same semantics as "-cpu max".
- */
- if (!strcmp(cpu_model, "any")) {
- cpu_model = "max";
- }
-#endif
typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
oc = object_class_by_name(typename);
g_free(typename);
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
` (4 preceding siblings ...)
2019-04-19 6:14 ` [Qemu-devel] [PATCH 4/7] arm: Remove special case for "any" CPU model Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-05-06 11:42 ` Markus Armbruster
2019-04-19 6:14 ` [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures Eduardo Habkost
` (2 subsequent siblings)
8 siblings, 2 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Richard Henderson, Igor Mammedov
Instead of requiring every architecture to implement a
class_by_name function, let them set a format string at
CPUClass::class_name_format.
This will let us get rid of at least 16 class_by_name functions
in the next commits.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
include/qom/cpu.h | 12 ++++++++++++
qom/cpu.c | 18 ++++++++++++++++--
2 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index fefd5c26b0..eda6a46b82 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -163,7 +163,19 @@ typedef struct CPUClass {
DeviceClass parent_class;
/*< public >*/
+ /* The following fields configure CPU model name -> QOM type translation: */
+
+ /*
+ * arch-specific CPU model -> QOM type translation function.
+ * Optional if @class_name_format is set.
+ */
ObjectClass *(*class_by_name)(const char *cpu_model);
+ /*
+ * Format string for g_strdup_printf(), used to generate the CPU
+ * class name.
+ */
+ const char *class_name_format;
+
void (*parse_features)(const char *typename, char *str, Error **errp);
void (*reset)(CPUState *cpu);
diff --git a/qom/cpu.c b/qom/cpu.c
index b971a56242..1fa64941b6 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -286,9 +286,23 @@ static bool cpu_common_has_work(CPUState *cs)
CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model)
{
CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
+ ObjectClass *oc;
+ char *class_name;
- assert(cpu_model && cc->class_by_name);
- return CPU_CLASS(cc->class_by_name(cpu_model));
+ assert(cpu_model);
+ if (cc->class_by_name) {
+ return CPU_CLASS(cc->class_by_name(cpu_model));
+ }
+
+ assert(cc->class_name_format);
+ class_name = g_strdup_printf(cc->class_name_format, cpu_model);
+ oc = object_class_by_name(class_name);
+ g_free(class_name);
+ if (!oc || !object_class_dynamic_cast(oc, typename) ||
+ object_class_is_abstract(oc)) {
+ return NULL;
+ }
+ return CPU_CLASS(oc);
}
static void cpu_common_parse_features(const char *typename, char *features,
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format
2019-04-19 6:14 ` [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-05-06 11:42 ` Markus Armbruster
1 sibling, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel; +Cc: Peter Maydell, Igor Mammedov, Richard Henderson
Instead of requiring every architecture to implement a
class_by_name function, let them set a format string at
CPUClass::class_name_format.
This will let us get rid of at least 16 class_by_name functions
in the next commits.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
include/qom/cpu.h | 12 ++++++++++++
qom/cpu.c | 18 ++++++++++++++++--
2 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/include/qom/cpu.h b/include/qom/cpu.h
index fefd5c26b0..eda6a46b82 100644
--- a/include/qom/cpu.h
+++ b/include/qom/cpu.h
@@ -163,7 +163,19 @@ typedef struct CPUClass {
DeviceClass parent_class;
/*< public >*/
+ /* The following fields configure CPU model name -> QOM type translation: */
+
+ /*
+ * arch-specific CPU model -> QOM type translation function.
+ * Optional if @class_name_format is set.
+ */
ObjectClass *(*class_by_name)(const char *cpu_model);
+ /*
+ * Format string for g_strdup_printf(), used to generate the CPU
+ * class name.
+ */
+ const char *class_name_format;
+
void (*parse_features)(const char *typename, char *str, Error **errp);
void (*reset)(CPUState *cpu);
diff --git a/qom/cpu.c b/qom/cpu.c
index b971a56242..1fa64941b6 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -286,9 +286,23 @@ static bool cpu_common_has_work(CPUState *cs)
CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model)
{
CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
+ ObjectClass *oc;
+ char *class_name;
- assert(cpu_model && cc->class_by_name);
- return CPU_CLASS(cc->class_by_name(cpu_model));
+ assert(cpu_model);
+ if (cc->class_by_name) {
+ return CPU_CLASS(cc->class_by_name(cpu_model));
+ }
+
+ assert(cc->class_name_format);
+ class_name = g_strdup_printf(cc->class_name_format, cpu_model);
+ oc = object_class_by_name(class_name);
+ g_free(class_name);
+ if (!oc || !object_class_dynamic_cast(oc, typename) ||
+ object_class_is_abstract(oc)) {
+ return NULL;
+ }
+ return CPU_CLASS(oc);
}
static void cpu_common_parse_features(const char *typename, char *features,
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
` (5 preceding siblings ...)
2019-04-19 6:14 ` [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 20:59 ` Alistair Francis
2019-04-19 6:14 ` [Qemu-devel] [PATCH 7/7] cpu: Set fixed class name on " Eduardo Habkost
2019-05-06 11:53 ` [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Markus Armbruster
8 siblings, 2 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, Igor Mammedov, Paolo Bonzini,
Michael Walle, Laurent Vivier, Aurelien Jarno,
Aleksandar Markovic, Aleksandar Rikalo, Anthony Green,
Stafford Horne, Palmer Dabbelt, Alistair Francis,
Sagar Karandikar, Bastian Koppelmann, Cornelia Huck,
David Hildenbrand, Guan Xuetao, Max Filippov, qemu-arm,
qemu-riscv, qemu-s390x
Set CPUClass::class_name_format for 12 architectures that simply
generate a class name using g_strdup_printf(): arm, i386, lm32,
m68k, mips, moxie, openrisc, riscv, s390x, tricore, unicore32,
xtensa.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Laurent Vivier <laurent@vivier.eu>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Aleksandar Markovic <amarkovic@wavecomp.com>
Cc: Aleksandar Rikalo <arikalo@wavecomp.com>
Cc: Anthony Green <green@moxielogic.com>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Cornelia Huck <cohuck@redhat.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: qemu-arm@nongnu.org
Cc: qemu-riscv@nongnu.org
Cc: qemu-s390x@nongnu.org
---
target/s390x/internal.h | 1 -
target/arm/cpu.c | 17 +----------------
target/i386/cpu.c | 11 +----------
target/lm32/cpu.c | 17 +----------------
target/m68k/cpu.c | 17 +----------------
target/mips/cpu.c | 13 +------------
target/moxie/cpu.c | 17 +----------------
target/openrisc/cpu.c | 17 +----------------
target/riscv/cpu.c | 17 +----------------
target/s390x/cpu.c | 2 +-
target/s390x/cpu_models.c | 10 ----------
target/tricore/cpu.c | 17 +----------------
target/unicore32/cpu.c | 17 +----------------
target/xtensa/cpu.c | 17 +----------------
14 files changed, 12 insertions(+), 178 deletions(-)
diff --git a/target/s390x/internal.h b/target/s390x/internal.h
index 3b4855c175..789d6444c9 100644
--- a/target/s390x/internal.h
+++ b/target/s390x/internal.h
@@ -256,7 +256,6 @@ static inline void s390_cpu_unhalt(S390CPU *cpu)
void s390_cpu_model_register_props(Object *obj);
void s390_cpu_model_class_register_props(ObjectClass *oc);
void s390_realize_cpu_model(CPUState *cs, Error **errp);
-ObjectClass *s390_cpu_class_by_name(const char *name);
/* excp_helper.c */
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index dcc65093d9..4f0ed3715d 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1208,21 +1208,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
acc->parent_realize(dev, errp);
}
-static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
/* CPU models. These are not needed for the AArch64 linux-user build. */
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
@@ -2142,7 +2127,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
acc->parent_reset = cc->reset;
cc->reset = arm_cpu_reset;
- cc->class_by_name = arm_cpu_class_by_name;
+ cc->class_name_format = ARM_CPU_TYPE_NAME("%s");
cc->has_work = arm_cpu_has_work;
cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->dump_state = arm_cpu_dump_state;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index d6bb57d210..18adef524f 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1391,15 +1391,6 @@ static char *x86_cpu_type_name(const char *model_name)
return g_strdup_printf(X86_CPU_TYPE_NAME("%s"), model_name);
}
-static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename = x86_cpu_type_name(cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- return oc;
-}
-
static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
{
const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
@@ -5851,7 +5842,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
cc->reset = x86_cpu_reset;
cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP;
- cc->class_by_name = x86_cpu_class_by_name;
+ cc->class_name_format = X86_CPU_TYPE_NAME("%s");
cc->parse_features = x86_cpu_parse_featurestr;
cc->has_work = x86_cpu_has_work;
#ifdef CONFIG_TCG
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index b7499cb627..675bea10e8 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -201,21 +201,6 @@ static void lm32_full_cpu_initfn(Object *obj)
| LM32_FEATURE_CYCLE_COUNT;
}
-static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
- object_class_is_abstract(oc))) {
- oc = NULL;
- }
- return oc;
-}
-
static void lm32_cpu_class_init(ObjectClass *oc, void *data)
{
LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
@@ -227,7 +212,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
lcc->parent_reset = cc->reset;
cc->reset = lm32_cpu_reset;
- cc->class_by_name = lm32_cpu_class_by_name;
+ cc->class_name_format = LM32_CPU_TYPE_NAME("%s");
cc->has_work = lm32_cpu_has_work;
cc->do_interrupt = lm32_cpu_do_interrupt;
cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 582e3a73b3..b582c8d980 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -81,21 +81,6 @@ static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
/* CPU models */
-static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
- object_class_is_abstract(oc))) {
- return NULL;
- }
- return oc;
-}
-
static void m5206_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
@@ -261,7 +246,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = m68k_cpu_reset;
- cc->class_by_name = m68k_cpu_class_by_name;
+ cc->class_name_format = M68K_CPU_TYPE_NAME("%s");
cc->has_work = m68k_cpu_has_work;
cc->do_interrupt = m68k_cpu_do_interrupt;
cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index e217fb3e36..c3b30f5562 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -166,17 +166,6 @@ static char *mips_cpu_type_name(const char *cpu_model)
return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model);
}
-static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = mips_cpu_type_name(cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- return oc;
-}
-
static void mips_cpu_class_init(ObjectClass *c, void *data)
{
MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
@@ -188,7 +177,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mips_cpu_reset;
- cc->class_by_name = mips_cpu_class_by_name;
+ cc->class_name_format = MIPS_CPU_TYPE_NAME("%s");
cc->has_work = mips_cpu_has_work;
cc->do_interrupt = mips_cpu_do_interrupt;
cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 46434e65ba..8e7768e576 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -80,21 +80,6 @@ static void moxie_cpu_initfn(Object *obj)
cs->env_ptr = &cpu->env;
}
-static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
- object_class_is_abstract(oc))) {
- return NULL;
- }
- return oc;
-}
-
static void moxie_cpu_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -106,7 +91,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
mcc->parent_reset = cc->reset;
cc->reset = moxie_cpu_reset;
- cc->class_by_name = moxie_cpu_class_by_name;
+ cc->class_name_format = MOXIE_CPU_TYPE_NAME("%s");
cc->has_work = moxie_cpu_has_work;
cc->do_interrupt = moxie_cpu_do_interrupt;
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 541b2a66c7..f78b5a2cd8 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -99,21 +99,6 @@ static void openrisc_cpu_initfn(Object *obj)
/* CPU models */
-static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
- object_class_is_abstract(oc))) {
- return NULL;
- }
- return oc;
-}
-
static void or1200_initfn(Object *obj)
{
OpenRISCCPU *cpu = OPENRISC_CPU(obj);
@@ -140,7 +125,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
occ->parent_reset = cc->reset;
cc->reset = openrisc_cpu_reset;
- cc->class_by_name = openrisc_cpu_class_by_name;
+ cc->class_name_format = OPENRISC_CPU_TYPE_NAME("%s");
cc->has_work = openrisc_cpu_has_work;
cc->do_interrupt = openrisc_cpu_do_interrupt;
cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 5e97a83c80..7bd32966bc 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -175,21 +175,6 @@ static void rv64imacu_nommu_cpu_init(Object *obj)
#endif
-static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf, int flags)
{
@@ -335,7 +320,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = riscv_cpu_reset;
- cc->class_by_name = riscv_cpu_class_by_name;
+ cc->class_name_format = RISCV_CPU_TYPE_NAME("%s");
cc->has_work = riscv_cpu_has_work;
cc->do_interrupt = riscv_cpu_do_interrupt;
cc->cpu_exec_interrupt = riscv_cpu_exec_interrupt;
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 698dd9cb82..4ecd3f60be 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -461,7 +461,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
scc->cpu_reset = s390_cpu_reset;
scc->initial_cpu_reset = s390_cpu_initial_reset;
cc->reset = s390_cpu_full_reset;
- cc->class_by_name = s390_cpu_class_by_name,
+ cc->class_name_format = S390_CPU_TYPE_NAME("%s");
cc->has_work = s390_cpu_has_work;
#ifdef CONFIG_TCG
cc->do_interrupt = s390_cpu_do_interrupt;
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 391698595f..fa248c5b3f 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -1278,16 +1278,6 @@ static char *s390_base_cpu_type_name(const char *model_name)
return g_strdup_printf(S390_CPU_TYPE_NAME("%s-base"), model_name);
}
-ObjectClass *s390_cpu_class_by_name(const char *name)
-{
- char *typename = s390_cpu_type_name(name);
- ObjectClass *oc;
-
- oc = object_class_by_name(typename);
- g_free(typename);
- return oc;
-}
-
static const TypeInfo qemu_s390_cpu_type_info = {
.name = S390_CPU_TYPE_NAME("qemu"),
.parent = TYPE_S390_CPU,
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index e8d37e4040..81460f6aed 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -111,21 +111,6 @@ static void tricore_cpu_initfn(Object *obj)
cs->env_ptr = env;
}
-static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
static void tc1796_initfn(Object *obj)
{
TriCoreCPU *cpu = TRICORE_CPU(obj);
@@ -158,7 +143,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = tricore_cpu_reset;
- cc->class_by_name = tricore_cpu_class_by_name;
+ cc->class_name_format = TRICORE_CPU_TYPE_NAME("%s");
cc->has_work = tricore_cpu_has_work;
cc->dump_state = tricore_cpu_dump_state;
diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
index 2b49d1ca40..f7b3dd2bb1 100644
--- a/target/unicore32/cpu.c
+++ b/target/unicore32/cpu.c
@@ -40,21 +40,6 @@ static inline void set_feature(CPUUniCore32State *env, int feature)
/* CPU models */
-static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
- object_class_is_abstract(oc))) {
- oc = NULL;
- }
- return oc;
-}
-
static void unicore_ii_cpu_initfn(Object *obj)
{
UniCore32CPU *cpu = UNICORE32_CPU(obj);
@@ -132,7 +117,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, uc32_cpu_realizefn,
&ucc->parent_realize);
- cc->class_by_name = uc32_cpu_class_by_name;
+ cc->class_name_format = UNICORE32_CPU_TYPE_NAME("%s");
cc->has_work = uc32_cpu_has_work;
cc->do_interrupt = uc32_cpu_do_interrupt;
cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt;
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index a54dbe4260..2278a46989 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -90,21 +90,6 @@ static void xtensa_cpu_reset(CPUState *s)
#endif
}
-static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
{
XtensaCPU *cpu = XTENSA_CPU(cs);
@@ -172,7 +157,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
xcc->parent_reset = cc->reset;
cc->reset = xtensa_cpu_reset;
- cc->class_by_name = xtensa_cpu_class_by_name;
+ cc->class_name_format = XTENSA_CPU_TYPE_NAME("%s");
cc->has_work = xtensa_cpu_has_work;
cc->do_interrupt = xtensa_cpu_do_interrupt;
cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures
2019-04-19 6:14 ` [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 20:59 ` Alistair Francis
1 sibling, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Sagar Karandikar, David Hildenbrand, Anthony Green,
Palmer Dabbelt, Max Filippov, Alistair Francis, Guan Xuetao,
Aleksandar Rikalo, qemu-s390x, qemu-arm, Igor Mammedov,
Stafford Horne, Richard Henderson, qemu-riscv, Bastian Koppelmann,
Cornelia Huck, Laurent Vivier, Michael Walle, Aleksandar Markovic,
Paolo Bonzini, Aurelien Jarno
Set CPUClass::class_name_format for 12 architectures that simply
generate a class name using g_strdup_printf(): arm, i386, lm32,
m68k, mips, moxie, openrisc, riscv, s390x, tricore, unicore32,
xtensa.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Peter Maydell <peter.maydell@linaro.org>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Richard Henderson <rth@twiddle.net>
Cc: Eduardo Habkost <ehabkost@redhat.com>
Cc: Michael Walle <michael@walle.cc>
Cc: Laurent Vivier <laurent@vivier.eu>
Cc: Aurelien Jarno <aurelien@aurel32.net>
Cc: Aleksandar Markovic <amarkovic@wavecomp.com>
Cc: Aleksandar Rikalo <arikalo@wavecomp.com>
Cc: Anthony Green <green@moxielogic.com>
Cc: Stafford Horne <shorne@gmail.com>
Cc: Palmer Dabbelt <palmer@sifive.com>
Cc: Alistair Francis <Alistair.Francis@wdc.com>
Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Cc: Cornelia Huck <cohuck@redhat.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
Cc: Max Filippov <jcmvbkbc@gmail.com>
Cc: qemu-arm@nongnu.org
Cc: qemu-riscv@nongnu.org
Cc: qemu-s390x@nongnu.org
---
target/s390x/internal.h | 1 -
target/arm/cpu.c | 17 +----------------
target/i386/cpu.c | 11 +----------
target/lm32/cpu.c | 17 +----------------
target/m68k/cpu.c | 17 +----------------
target/mips/cpu.c | 13 +------------
target/moxie/cpu.c | 17 +----------------
target/openrisc/cpu.c | 17 +----------------
target/riscv/cpu.c | 17 +----------------
target/s390x/cpu.c | 2 +-
target/s390x/cpu_models.c | 10 ----------
target/tricore/cpu.c | 17 +----------------
target/unicore32/cpu.c | 17 +----------------
target/xtensa/cpu.c | 17 +----------------
14 files changed, 12 insertions(+), 178 deletions(-)
diff --git a/target/s390x/internal.h b/target/s390x/internal.h
index 3b4855c175..789d6444c9 100644
--- a/target/s390x/internal.h
+++ b/target/s390x/internal.h
@@ -256,7 +256,6 @@ static inline void s390_cpu_unhalt(S390CPU *cpu)
void s390_cpu_model_register_props(Object *obj);
void s390_cpu_model_class_register_props(ObjectClass *oc);
void s390_realize_cpu_model(CPUState *cs, Error **errp);
-ObjectClass *s390_cpu_class_by_name(const char *name);
/* excp_helper.c */
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index dcc65093d9..4f0ed3715d 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -1208,21 +1208,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
acc->parent_realize(dev, errp);
}
-static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
/* CPU models. These are not needed for the AArch64 linux-user build. */
#if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
@@ -2142,7 +2127,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
acc->parent_reset = cc->reset;
cc->reset = arm_cpu_reset;
- cc->class_by_name = arm_cpu_class_by_name;
+ cc->class_name_format = ARM_CPU_TYPE_NAME("%s");
cc->has_work = arm_cpu_has_work;
cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
cc->dump_state = arm_cpu_dump_state;
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index d6bb57d210..18adef524f 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -1391,15 +1391,6 @@ static char *x86_cpu_type_name(const char *model_name)
return g_strdup_printf(X86_CPU_TYPE_NAME("%s"), model_name);
}
-static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename = x86_cpu_type_name(cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- return oc;
-}
-
static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
{
const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
@@ -5851,7 +5842,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
cc->reset = x86_cpu_reset;
cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP;
- cc->class_by_name = x86_cpu_class_by_name;
+ cc->class_name_format = X86_CPU_TYPE_NAME("%s");
cc->parse_features = x86_cpu_parse_featurestr;
cc->has_work = x86_cpu_has_work;
#ifdef CONFIG_TCG
diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
index b7499cb627..675bea10e8 100644
--- a/target/lm32/cpu.c
+++ b/target/lm32/cpu.c
@@ -201,21 +201,6 @@ static void lm32_full_cpu_initfn(Object *obj)
| LM32_FEATURE_CYCLE_COUNT;
}
-static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
- object_class_is_abstract(oc))) {
- oc = NULL;
- }
- return oc;
-}
-
static void lm32_cpu_class_init(ObjectClass *oc, void *data)
{
LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
@@ -227,7 +212,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
lcc->parent_reset = cc->reset;
cc->reset = lm32_cpu_reset;
- cc->class_by_name = lm32_cpu_class_by_name;
+ cc->class_name_format = LM32_CPU_TYPE_NAME("%s");
cc->has_work = lm32_cpu_has_work;
cc->do_interrupt = lm32_cpu_do_interrupt;
cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
index 582e3a73b3..b582c8d980 100644
--- a/target/m68k/cpu.c
+++ b/target/m68k/cpu.c
@@ -81,21 +81,6 @@ static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
/* CPU models */
-static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
- object_class_is_abstract(oc))) {
- return NULL;
- }
- return oc;
-}
-
static void m5206_cpu_initfn(Object *obj)
{
M68kCPU *cpu = M68K_CPU(obj);
@@ -261,7 +246,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = m68k_cpu_reset;
- cc->class_by_name = m68k_cpu_class_by_name;
+ cc->class_name_format = M68K_CPU_TYPE_NAME("%s");
cc->has_work = m68k_cpu_has_work;
cc->do_interrupt = m68k_cpu_do_interrupt;
cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
diff --git a/target/mips/cpu.c b/target/mips/cpu.c
index e217fb3e36..c3b30f5562 100644
--- a/target/mips/cpu.c
+++ b/target/mips/cpu.c
@@ -166,17 +166,6 @@ static char *mips_cpu_type_name(const char *cpu_model)
return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model);
}
-static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = mips_cpu_type_name(cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- return oc;
-}
-
static void mips_cpu_class_init(ObjectClass *c, void *data)
{
MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
@@ -188,7 +177,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mips_cpu_reset;
- cc->class_by_name = mips_cpu_class_by_name;
+ cc->class_name_format = MIPS_CPU_TYPE_NAME("%s");
cc->has_work = mips_cpu_has_work;
cc->do_interrupt = mips_cpu_do_interrupt;
cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
index 46434e65ba..8e7768e576 100644
--- a/target/moxie/cpu.c
+++ b/target/moxie/cpu.c
@@ -80,21 +80,6 @@ static void moxie_cpu_initfn(Object *obj)
cs->env_ptr = &cpu->env;
}
-static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
- object_class_is_abstract(oc))) {
- return NULL;
- }
- return oc;
-}
-
static void moxie_cpu_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -106,7 +91,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
mcc->parent_reset = cc->reset;
cc->reset = moxie_cpu_reset;
- cc->class_by_name = moxie_cpu_class_by_name;
+ cc->class_name_format = MOXIE_CPU_TYPE_NAME("%s");
cc->has_work = moxie_cpu_has_work;
cc->do_interrupt = moxie_cpu_do_interrupt;
diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
index 541b2a66c7..f78b5a2cd8 100644
--- a/target/openrisc/cpu.c
+++ b/target/openrisc/cpu.c
@@ -99,21 +99,6 @@ static void openrisc_cpu_initfn(Object *obj)
/* CPU models */
-static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
- object_class_is_abstract(oc))) {
- return NULL;
- }
- return oc;
-}
-
static void or1200_initfn(Object *obj)
{
OpenRISCCPU *cpu = OPENRISC_CPU(obj);
@@ -140,7 +125,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
occ->parent_reset = cc->reset;
cc->reset = openrisc_cpu_reset;
- cc->class_by_name = openrisc_cpu_class_by_name;
+ cc->class_name_format = OPENRISC_CPU_TYPE_NAME("%s");
cc->has_work = openrisc_cpu_has_work;
cc->do_interrupt = openrisc_cpu_do_interrupt;
cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 5e97a83c80..7bd32966bc 100644
--- a/target/riscv/cpu.c
+++ b/target/riscv/cpu.c
@@ -175,21 +175,6 @@ static void rv64imacu_nommu_cpu_init(Object *obj)
#endif
-static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
fprintf_function cpu_fprintf, int flags)
{
@@ -335,7 +320,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = riscv_cpu_reset;
- cc->class_by_name = riscv_cpu_class_by_name;
+ cc->class_name_format = RISCV_CPU_TYPE_NAME("%s");
cc->has_work = riscv_cpu_has_work;
cc->do_interrupt = riscv_cpu_do_interrupt;
cc->cpu_exec_interrupt = riscv_cpu_exec_interrupt;
diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
index 698dd9cb82..4ecd3f60be 100644
--- a/target/s390x/cpu.c
+++ b/target/s390x/cpu.c
@@ -461,7 +461,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
scc->cpu_reset = s390_cpu_reset;
scc->initial_cpu_reset = s390_cpu_initial_reset;
cc->reset = s390_cpu_full_reset;
- cc->class_by_name = s390_cpu_class_by_name,
+ cc->class_name_format = S390_CPU_TYPE_NAME("%s");
cc->has_work = s390_cpu_has_work;
#ifdef CONFIG_TCG
cc->do_interrupt = s390_cpu_do_interrupt;
diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
index 391698595f..fa248c5b3f 100644
--- a/target/s390x/cpu_models.c
+++ b/target/s390x/cpu_models.c
@@ -1278,16 +1278,6 @@ static char *s390_base_cpu_type_name(const char *model_name)
return g_strdup_printf(S390_CPU_TYPE_NAME("%s-base"), model_name);
}
-ObjectClass *s390_cpu_class_by_name(const char *name)
-{
- char *typename = s390_cpu_type_name(name);
- ObjectClass *oc;
-
- oc = object_class_by_name(typename);
- g_free(typename);
- return oc;
-}
-
static const TypeInfo qemu_s390_cpu_type_info = {
.name = S390_CPU_TYPE_NAME("qemu"),
.parent = TYPE_S390_CPU,
diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
index e8d37e4040..81460f6aed 100644
--- a/target/tricore/cpu.c
+++ b/target/tricore/cpu.c
@@ -111,21 +111,6 @@ static void tricore_cpu_initfn(Object *obj)
cs->env_ptr = env;
}
-static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
static void tc1796_initfn(Object *obj)
{
TriCoreCPU *cpu = TRICORE_CPU(obj);
@@ -158,7 +143,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
mcc->parent_reset = cc->reset;
cc->reset = tricore_cpu_reset;
- cc->class_by_name = tricore_cpu_class_by_name;
+ cc->class_name_format = TRICORE_CPU_TYPE_NAME("%s");
cc->has_work = tricore_cpu_has_work;
cc->dump_state = tricore_cpu_dump_state;
diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
index 2b49d1ca40..f7b3dd2bb1 100644
--- a/target/unicore32/cpu.c
+++ b/target/unicore32/cpu.c
@@ -40,21 +40,6 @@ static inline void set_feature(CPUUniCore32State *env, int feature)
/* CPU models */
-static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
- object_class_is_abstract(oc))) {
- oc = NULL;
- }
- return oc;
-}
-
static void unicore_ii_cpu_initfn(Object *obj)
{
UniCore32CPU *cpu = UNICORE32_CPU(obj);
@@ -132,7 +117,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, uc32_cpu_realizefn,
&ucc->parent_realize);
- cc->class_by_name = uc32_cpu_class_by_name;
+ cc->class_name_format = UNICORE32_CPU_TYPE_NAME("%s");
cc->has_work = uc32_cpu_has_work;
cc->do_interrupt = uc32_cpu_do_interrupt;
cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt;
diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
index a54dbe4260..2278a46989 100644
--- a/target/xtensa/cpu.c
+++ b/target/xtensa/cpu.c
@@ -90,21 +90,6 @@ static void xtensa_cpu_reset(CPUState *s)
#endif
}
-static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
-{
- ObjectClass *oc;
- char *typename;
-
- typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
- oc = object_class_by_name(typename);
- g_free(typename);
- if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
- object_class_is_abstract(oc)) {
- return NULL;
- }
- return oc;
-}
-
static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
{
XtensaCPU *cpu = XTENSA_CPU(cs);
@@ -172,7 +157,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
xcc->parent_reset = cc->reset;
cc->reset = xtensa_cpu_reset;
- cc->class_by_name = xtensa_cpu_class_by_name;
+ cc->class_name_format = XTENSA_CPU_TYPE_NAME("%s");
cc->has_work = xtensa_cpu_has_work;
cc->do_interrupt = xtensa_cpu_do_interrupt;
cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 7/7] cpu: Set fixed class name on some architectures
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
` (6 preceding siblings ...)
2019-04-19 6:14 ` [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-05-06 11:53 ` [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Markus Armbruster
8 siblings, 1 reply; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Richard Henderson, Igor Mammedov,
Edgar E. Iglesias, Chris Wulff, Marek Vasut
hppa, microblaze, nios2, and tilegx have a fixed class name being
returned by CPUClass::class_by_name. We can implement the same
behavior by setting CPUClass::class_name_format.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Richard Henderson <rth@twiddle.net>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Chris Wulff <crwulff@gmail.com>
Cc: Marek Vasut <marex@denx.de>
---
target/hppa/cpu.c | 8 ++------
target/microblaze/cpu.c | 8 ++------
target/nios2/cpu.c | 8 ++------
target/tilegx/cpu.c | 8 ++------
4 files changed, 8 insertions(+), 24 deletions(-)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 00bf444620..c4a1106df9 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -144,11 +144,6 @@ static void hppa_cpu_initfn(Object *obj)
cpu_hppa_put_psw(env, PSW_W);
}
-static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_HPPA_CPU);
-}
-
static void hppa_cpu_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -158,7 +153,8 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, hppa_cpu_realizefn,
&acc->parent_realize);
- cc->class_by_name = hppa_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_HPPA_CPU;
cc->has_work = hppa_cpu_has_work;
cc->do_interrupt = hppa_cpu_do_interrupt;
cc->cpu_exec_interrupt = hppa_cpu_exec_interrupt;
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 5596cd5485..aee09f7d96 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -280,11 +280,6 @@ static Property mb_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static ObjectClass *mb_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_MICROBLAZE_CPU);
-}
-
static void mb_cpu_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -296,7 +291,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mb_cpu_reset;
- cc->class_by_name = mb_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_MICROBLAZE_CPU;
cc->has_work = mb_cpu_has_work;
cc->do_interrupt = mb_cpu_do_interrupt;
cc->cpu_exec_interrupt = mb_cpu_exec_interrupt;
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index fbfaa2ce26..3427ffedca 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -77,11 +77,6 @@ static void nios2_cpu_initfn(Object *obj)
#endif
}
-static ObjectClass *nios2_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_NIOS2_CPU);
-}
-
static void nios2_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -193,7 +188,8 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
ncc->parent_reset = cc->reset;
cc->reset = nios2_cpu_reset;
- cc->class_by_name = nios2_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_NIOS2_CPU;
cc->has_work = nios2_cpu_has_work;
cc->do_interrupt = nios2_cpu_do_interrupt;
cc->cpu_exec_interrupt = nios2_cpu_exec_interrupt;
diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c
index bfe9be59b5..710af17507 100644
--- a/target/tilegx/cpu.c
+++ b/target/tilegx/cpu.c
@@ -51,11 +51,6 @@ static void tilegx_cpu_dump_state(CPUState *cs, FILE *f,
env->pc, env->spregs[TILEGX_SPR_CMPEXCH]);
}
-static ObjectClass *tilegx_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_TILEGX_CPU);
-}
-
static void tilegx_cpu_set_pc(CPUState *cs, vaddr value)
{
TileGXCPU *cpu = TILEGX_CPU(cs);
@@ -146,7 +141,8 @@ static void tilegx_cpu_class_init(ObjectClass *oc, void *data)
tcc->parent_reset = cc->reset;
cc->reset = tilegx_cpu_reset;
- cc->class_by_name = tilegx_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_TILEGX_CPU;
cc->has_work = tilegx_cpu_has_work;
cc->do_interrupt = tilegx_cpu_do_interrupt;
cc->cpu_exec_interrupt = tilegx_cpu_exec_interrupt;
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* [Qemu-devel] [PATCH 7/7] cpu: Set fixed class name on some architectures
2019-04-19 6:14 ` [Qemu-devel] [PATCH 7/7] cpu: Set fixed class name on " Eduardo Habkost
@ 2019-04-19 6:14 ` Eduardo Habkost
0 siblings, 0 replies; 28+ messages in thread
From: Eduardo Habkost @ 2019-04-19 6:14 UTC (permalink / raw)
To: qemu-devel
Cc: Marek Vasut, Peter Maydell, Chris Wulff, Edgar E. Iglesias,
Igor Mammedov, Richard Henderson
hppa, microblaze, nios2, and tilegx have a fixed class name being
returned by CPUClass::class_by_name. We can implement the same
behavior by setting CPUClass::class_name_format.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
---
Cc: Richard Henderson <rth@twiddle.net>
Cc: "Edgar E. Iglesias" <edgar.iglesias@gmail.com>
Cc: Chris Wulff <crwulff@gmail.com>
Cc: Marek Vasut <marex@denx.de>
---
target/hppa/cpu.c | 8 ++------
target/microblaze/cpu.c | 8 ++------
target/nios2/cpu.c | 8 ++------
target/tilegx/cpu.c | 8 ++------
4 files changed, 8 insertions(+), 24 deletions(-)
diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c
index 00bf444620..c4a1106df9 100644
--- a/target/hppa/cpu.c
+++ b/target/hppa/cpu.c
@@ -144,11 +144,6 @@ static void hppa_cpu_initfn(Object *obj)
cpu_hppa_put_psw(env, PSW_W);
}
-static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_HPPA_CPU);
-}
-
static void hppa_cpu_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -158,7 +153,8 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data)
device_class_set_parent_realize(dc, hppa_cpu_realizefn,
&acc->parent_realize);
- cc->class_by_name = hppa_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_HPPA_CPU;
cc->has_work = hppa_cpu_has_work;
cc->do_interrupt = hppa_cpu_do_interrupt;
cc->cpu_exec_interrupt = hppa_cpu_exec_interrupt;
diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c
index 5596cd5485..aee09f7d96 100644
--- a/target/microblaze/cpu.c
+++ b/target/microblaze/cpu.c
@@ -280,11 +280,6 @@ static Property mb_properties[] = {
DEFINE_PROP_END_OF_LIST(),
};
-static ObjectClass *mb_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_MICROBLAZE_CPU);
-}
-
static void mb_cpu_class_init(ObjectClass *oc, void *data)
{
DeviceClass *dc = DEVICE_CLASS(oc);
@@ -296,7 +291,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
mcc->parent_reset = cc->reset;
cc->reset = mb_cpu_reset;
- cc->class_by_name = mb_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_MICROBLAZE_CPU;
cc->has_work = mb_cpu_has_work;
cc->do_interrupt = mb_cpu_do_interrupt;
cc->cpu_exec_interrupt = mb_cpu_exec_interrupt;
diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c
index fbfaa2ce26..3427ffedca 100644
--- a/target/nios2/cpu.c
+++ b/target/nios2/cpu.c
@@ -77,11 +77,6 @@ static void nios2_cpu_initfn(Object *obj)
#endif
}
-static ObjectClass *nios2_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_NIOS2_CPU);
-}
-
static void nios2_cpu_realizefn(DeviceState *dev, Error **errp)
{
CPUState *cs = CPU(dev);
@@ -193,7 +188,8 @@ static void nios2_cpu_class_init(ObjectClass *oc, void *data)
ncc->parent_reset = cc->reset;
cc->reset = nios2_cpu_reset;
- cc->class_by_name = nios2_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_NIOS2_CPU;
cc->has_work = nios2_cpu_has_work;
cc->do_interrupt = nios2_cpu_do_interrupt;
cc->cpu_exec_interrupt = nios2_cpu_exec_interrupt;
diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c
index bfe9be59b5..710af17507 100644
--- a/target/tilegx/cpu.c
+++ b/target/tilegx/cpu.c
@@ -51,11 +51,6 @@ static void tilegx_cpu_dump_state(CPUState *cs, FILE *f,
env->pc, env->spregs[TILEGX_SPR_CMPEXCH]);
}
-static ObjectClass *tilegx_cpu_class_by_name(const char *cpu_model)
-{
- return object_class_by_name(TYPE_TILEGX_CPU);
-}
-
static void tilegx_cpu_set_pc(CPUState *cs, vaddr value)
{
TileGXCPU *cpu = TILEGX_CPU(cs);
@@ -146,7 +141,8 @@ static void tilegx_cpu_class_init(ObjectClass *oc, void *data)
tcc->parent_reset = cc->reset;
cc->reset = tilegx_cpu_reset;
- cc->class_by_name = tilegx_cpu_class_by_name;
+ /* All CPU model names are translated to the same QOM class */
+ cc->class_name_format = TYPE_TILEGX_CPU;
cc->has_work = tilegx_cpu_has_work;
cc->do_interrupt = tilegx_cpu_do_interrupt;
cc->cpu_exec_interrupt = tilegx_cpu_exec_interrupt;
--
2.18.0.rc1.1.g3f1ff2140
^ permalink raw reply related [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures
2019-04-19 6:14 ` [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
@ 2019-04-19 20:59 ` Alistair Francis
2019-04-19 20:59 ` Alistair Francis
1 sibling, 1 reply; 28+ messages in thread
From: Alistair Francis @ 2019-04-19 20:59 UTC (permalink / raw)
To: Eduardo Habkost
Cc: qemu-devel@nongnu.org Developers, Peter Maydell, Sagar Karandikar,
David Hildenbrand, Anthony Green, Palmer Dabbelt, Max Filippov,
Alistair Francis, Guan Xuetao, Aleksandar Rikalo, qemu-s390x,
qemu-arm, Igor Mammedov, Stafford Horne, Richard Henderson,
open list:RISC-V, Bastian Koppelmann, Cornelia Huck,
Laurent Vivier, Michael Walle, Aleksandar Markovic, Paolo Bonzini,
Aurelien Jarno
On Thu, Apr 18, 2019 at 11:23 PM Eduardo Habkost <ehabkost@redhat.com> wrote:
>
> Set CPUClass::class_name_format for 12 architectures that simply
> generate a class name using g_strdup_printf(): arm, i386, lm32,
> m68k, mips, moxie, openrisc, riscv, s390x, tricore, unicore32,
> xtensa.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
> ---
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Cc: Michael Walle <michael@walle.cc>
> Cc: Laurent Vivier <laurent@vivier.eu>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Cc: Aleksandar Markovic <amarkovic@wavecomp.com>
> Cc: Aleksandar Rikalo <arikalo@wavecomp.com>
> Cc: Anthony Green <green@moxielogic.com>
> Cc: Stafford Horne <shorne@gmail.com>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Alistair Francis <Alistair.Francis@wdc.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: Cornelia Huck <cohuck@redhat.com>
> Cc: David Hildenbrand <david@redhat.com>
> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
> Cc: Max Filippov <jcmvbkbc@gmail.com>
> Cc: qemu-arm@nongnu.org
> Cc: qemu-riscv@nongnu.org
> Cc: qemu-s390x@nongnu.org
For RISC-V:
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/s390x/internal.h | 1 -
> target/arm/cpu.c | 17 +----------------
> target/i386/cpu.c | 11 +----------
> target/lm32/cpu.c | 17 +----------------
> target/m68k/cpu.c | 17 +----------------
> target/mips/cpu.c | 13 +------------
> target/moxie/cpu.c | 17 +----------------
> target/openrisc/cpu.c | 17 +----------------
> target/riscv/cpu.c | 17 +----------------
> target/s390x/cpu.c | 2 +-
> target/s390x/cpu_models.c | 10 ----------
> target/tricore/cpu.c | 17 +----------------
> target/unicore32/cpu.c | 17 +----------------
> target/xtensa/cpu.c | 17 +----------------
> 14 files changed, 12 insertions(+), 178 deletions(-)
>
> diff --git a/target/s390x/internal.h b/target/s390x/internal.h
> index 3b4855c175..789d6444c9 100644
> --- a/target/s390x/internal.h
> +++ b/target/s390x/internal.h
> @@ -256,7 +256,6 @@ static inline void s390_cpu_unhalt(S390CPU *cpu)
> void s390_cpu_model_register_props(Object *obj);
> void s390_cpu_model_class_register_props(ObjectClass *oc);
> void s390_realize_cpu_model(CPUState *cs, Error **errp);
> -ObjectClass *s390_cpu_class_by_name(const char *name);
>
>
> /* excp_helper.c */
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index dcc65093d9..4f0ed3715d 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1208,21 +1208,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
> acc->parent_realize(dev, errp);
> }
>
> -static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> /* CPU models. These are not needed for the AArch64 linux-user build. */
> #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
>
> @@ -2142,7 +2127,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
> acc->parent_reset = cc->reset;
> cc->reset = arm_cpu_reset;
>
> - cc->class_by_name = arm_cpu_class_by_name;
> + cc->class_name_format = ARM_CPU_TYPE_NAME("%s");
> cc->has_work = arm_cpu_has_work;
> cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
> cc->dump_state = arm_cpu_dump_state;
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index d6bb57d210..18adef524f 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1391,15 +1391,6 @@ static char *x86_cpu_type_name(const char *model_name)
> return g_strdup_printf(X86_CPU_TYPE_NAME("%s"), model_name);
> }
>
> -static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename = x86_cpu_type_name(cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - return oc;
> -}
> -
> static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
> {
> const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
> @@ -5851,7 +5842,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
> cc->reset = x86_cpu_reset;
> cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP;
>
> - cc->class_by_name = x86_cpu_class_by_name;
> + cc->class_name_format = X86_CPU_TYPE_NAME("%s");
> cc->parse_features = x86_cpu_parse_featurestr;
> cc->has_work = x86_cpu_has_work;
> #ifdef CONFIG_TCG
> diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
> index b7499cb627..675bea10e8 100644
> --- a/target/lm32/cpu.c
> +++ b/target/lm32/cpu.c
> @@ -201,21 +201,6 @@ static void lm32_full_cpu_initfn(Object *obj)
> | LM32_FEATURE_CYCLE_COUNT;
> }
>
> -static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
> - object_class_is_abstract(oc))) {
> - oc = NULL;
> - }
> - return oc;
> -}
> -
> static void lm32_cpu_class_init(ObjectClass *oc, void *data)
> {
> LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
> @@ -227,7 +212,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
> lcc->parent_reset = cc->reset;
> cc->reset = lm32_cpu_reset;
>
> - cc->class_by_name = lm32_cpu_class_by_name;
> + cc->class_name_format = LM32_CPU_TYPE_NAME("%s");
> cc->has_work = lm32_cpu_has_work;
> cc->do_interrupt = lm32_cpu_do_interrupt;
> cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
> diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
> index 582e3a73b3..b582c8d980 100644
> --- a/target/m68k/cpu.c
> +++ b/target/m68k/cpu.c
> @@ -81,21 +81,6 @@ static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
>
> /* CPU models */
>
> -static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
> - object_class_is_abstract(oc))) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void m5206_cpu_initfn(Object *obj)
> {
> M68kCPU *cpu = M68K_CPU(obj);
> @@ -261,7 +246,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = m68k_cpu_reset;
>
> - cc->class_by_name = m68k_cpu_class_by_name;
> + cc->class_name_format = M68K_CPU_TYPE_NAME("%s");
> cc->has_work = m68k_cpu_has_work;
> cc->do_interrupt = m68k_cpu_do_interrupt;
> cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> index e217fb3e36..c3b30f5562 100644
> --- a/target/mips/cpu.c
> +++ b/target/mips/cpu.c
> @@ -166,17 +166,6 @@ static char *mips_cpu_type_name(const char *cpu_model)
> return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model);
> }
>
> -static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = mips_cpu_type_name(cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - return oc;
> -}
> -
> static void mips_cpu_class_init(ObjectClass *c, void *data)
> {
> MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
> @@ -188,7 +177,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = mips_cpu_reset;
>
> - cc->class_by_name = mips_cpu_class_by_name;
> + cc->class_name_format = MIPS_CPU_TYPE_NAME("%s");
> cc->has_work = mips_cpu_has_work;
> cc->do_interrupt = mips_cpu_do_interrupt;
> cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
> diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
> index 46434e65ba..8e7768e576 100644
> --- a/target/moxie/cpu.c
> +++ b/target/moxie/cpu.c
> @@ -80,21 +80,6 @@ static void moxie_cpu_initfn(Object *obj)
> cs->env_ptr = &cpu->env;
> }
>
> -static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
> - object_class_is_abstract(oc))) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void moxie_cpu_class_init(ObjectClass *oc, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -106,7 +91,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = moxie_cpu_reset;
>
> - cc->class_by_name = moxie_cpu_class_by_name;
> + cc->class_name_format = MOXIE_CPU_TYPE_NAME("%s");
>
> cc->has_work = moxie_cpu_has_work;
> cc->do_interrupt = moxie_cpu_do_interrupt;
> diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
> index 541b2a66c7..f78b5a2cd8 100644
> --- a/target/openrisc/cpu.c
> +++ b/target/openrisc/cpu.c
> @@ -99,21 +99,6 @@ static void openrisc_cpu_initfn(Object *obj)
>
> /* CPU models */
>
> -static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
> - object_class_is_abstract(oc))) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void or1200_initfn(Object *obj)
> {
> OpenRISCCPU *cpu = OPENRISC_CPU(obj);
> @@ -140,7 +125,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
> occ->parent_reset = cc->reset;
> cc->reset = openrisc_cpu_reset;
>
> - cc->class_by_name = openrisc_cpu_class_by_name;
> + cc->class_name_format = OPENRISC_CPU_TYPE_NAME("%s");
> cc->has_work = openrisc_cpu_has_work;
> cc->do_interrupt = openrisc_cpu_do_interrupt;
> cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 5e97a83c80..7bd32966bc 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -175,21 +175,6 @@ static void rv64imacu_nommu_cpu_init(Object *obj)
>
> #endif
>
> -static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
> fprintf_function cpu_fprintf, int flags)
> {
> @@ -335,7 +320,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = riscv_cpu_reset;
>
> - cc->class_by_name = riscv_cpu_class_by_name;
> + cc->class_name_format = RISCV_CPU_TYPE_NAME("%s");
> cc->has_work = riscv_cpu_has_work;
> cc->do_interrupt = riscv_cpu_do_interrupt;
> cc->cpu_exec_interrupt = riscv_cpu_exec_interrupt;
> diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> index 698dd9cb82..4ecd3f60be 100644
> --- a/target/s390x/cpu.c
> +++ b/target/s390x/cpu.c
> @@ -461,7 +461,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
> scc->cpu_reset = s390_cpu_reset;
> scc->initial_cpu_reset = s390_cpu_initial_reset;
> cc->reset = s390_cpu_full_reset;
> - cc->class_by_name = s390_cpu_class_by_name,
> + cc->class_name_format = S390_CPU_TYPE_NAME("%s");
> cc->has_work = s390_cpu_has_work;
> #ifdef CONFIG_TCG
> cc->do_interrupt = s390_cpu_do_interrupt;
> diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
> index 391698595f..fa248c5b3f 100644
> --- a/target/s390x/cpu_models.c
> +++ b/target/s390x/cpu_models.c
> @@ -1278,16 +1278,6 @@ static char *s390_base_cpu_type_name(const char *model_name)
> return g_strdup_printf(S390_CPU_TYPE_NAME("%s-base"), model_name);
> }
>
> -ObjectClass *s390_cpu_class_by_name(const char *name)
> -{
> - char *typename = s390_cpu_type_name(name);
> - ObjectClass *oc;
> -
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - return oc;
> -}
> -
> static const TypeInfo qemu_s390_cpu_type_info = {
> .name = S390_CPU_TYPE_NAME("qemu"),
> .parent = TYPE_S390_CPU,
> diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
> index e8d37e4040..81460f6aed 100644
> --- a/target/tricore/cpu.c
> +++ b/target/tricore/cpu.c
> @@ -111,21 +111,6 @@ static void tricore_cpu_initfn(Object *obj)
> cs->env_ptr = env;
> }
>
> -static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void tc1796_initfn(Object *obj)
> {
> TriCoreCPU *cpu = TRICORE_CPU(obj);
> @@ -158,7 +143,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
>
> mcc->parent_reset = cc->reset;
> cc->reset = tricore_cpu_reset;
> - cc->class_by_name = tricore_cpu_class_by_name;
> + cc->class_name_format = TRICORE_CPU_TYPE_NAME("%s");
> cc->has_work = tricore_cpu_has_work;
>
> cc->dump_state = tricore_cpu_dump_state;
> diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
> index 2b49d1ca40..f7b3dd2bb1 100644
> --- a/target/unicore32/cpu.c
> +++ b/target/unicore32/cpu.c
> @@ -40,21 +40,6 @@ static inline void set_feature(CPUUniCore32State *env, int feature)
>
> /* CPU models */
>
> -static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
> - object_class_is_abstract(oc))) {
> - oc = NULL;
> - }
> - return oc;
> -}
> -
> static void unicore_ii_cpu_initfn(Object *obj)
> {
> UniCore32CPU *cpu = UNICORE32_CPU(obj);
> @@ -132,7 +117,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
> device_class_set_parent_realize(dc, uc32_cpu_realizefn,
> &ucc->parent_realize);
>
> - cc->class_by_name = uc32_cpu_class_by_name;
> + cc->class_name_format = UNICORE32_CPU_TYPE_NAME("%s");
> cc->has_work = uc32_cpu_has_work;
> cc->do_interrupt = uc32_cpu_do_interrupt;
> cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt;
> diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
> index a54dbe4260..2278a46989 100644
> --- a/target/xtensa/cpu.c
> +++ b/target/xtensa/cpu.c
> @@ -90,21 +90,6 @@ static void xtensa_cpu_reset(CPUState *s)
> #endif
> }
>
> -static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
> {
> XtensaCPU *cpu = XTENSA_CPU(cs);
> @@ -172,7 +157,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
> xcc->parent_reset = cc->reset;
> cc->reset = xtensa_cpu_reset;
>
> - cc->class_by_name = xtensa_cpu_class_by_name;
> + cc->class_name_format = XTENSA_CPU_TYPE_NAME("%s");
> cc->has_work = xtensa_cpu_has_work;
> cc->do_interrupt = xtensa_cpu_do_interrupt;
> cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
> --
> 2.18.0.rc1.1.g3f1ff2140
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures
2019-04-19 20:59 ` Alistair Francis
@ 2019-04-19 20:59 ` Alistair Francis
0 siblings, 0 replies; 28+ messages in thread
From: Alistair Francis @ 2019-04-19 20:59 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Sagar Karandikar, David Hildenbrand, Anthony Green,
Palmer Dabbelt, qemu-devel@nongnu.org Developers, Max Filippov,
Alistair Francis, Guan Xuetao, Aleksandar Rikalo, qemu-s390x,
qemu-arm, Igor Mammedov, Stafford Horne, Richard Henderson,
open list:RISC-V, Bastian Koppelmann, Cornelia Huck,
Laurent Vivier, Michael Walle, Aleksandar Markovic, Paolo Bonzini,
Aurelien Jarno
On Thu, Apr 18, 2019 at 11:23 PM Eduardo Habkost <ehabkost@redhat.com> wrote:
>
> Set CPUClass::class_name_format for 12 architectures that simply
> generate a class name using g_strdup_printf(): arm, i386, lm32,
> m68k, mips, moxie, openrisc, riscv, s390x, tricore, unicore32,
> xtensa.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
> ---
> Cc: Peter Maydell <peter.maydell@linaro.org>
> Cc: Paolo Bonzini <pbonzini@redhat.com>
> Cc: Richard Henderson <rth@twiddle.net>
> Cc: Eduardo Habkost <ehabkost@redhat.com>
> Cc: Michael Walle <michael@walle.cc>
> Cc: Laurent Vivier <laurent@vivier.eu>
> Cc: Aurelien Jarno <aurelien@aurel32.net>
> Cc: Aleksandar Markovic <amarkovic@wavecomp.com>
> Cc: Aleksandar Rikalo <arikalo@wavecomp.com>
> Cc: Anthony Green <green@moxielogic.com>
> Cc: Stafford Horne <shorne@gmail.com>
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Alistair Francis <Alistair.Francis@wdc.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: Cornelia Huck <cohuck@redhat.com>
> Cc: David Hildenbrand <david@redhat.com>
> Cc: Guan Xuetao <gxt@mprc.pku.edu.cn>
> Cc: Max Filippov <jcmvbkbc@gmail.com>
> Cc: qemu-arm@nongnu.org
> Cc: qemu-riscv@nongnu.org
> Cc: qemu-s390x@nongnu.org
For RISC-V:
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> target/s390x/internal.h | 1 -
> target/arm/cpu.c | 17 +----------------
> target/i386/cpu.c | 11 +----------
> target/lm32/cpu.c | 17 +----------------
> target/m68k/cpu.c | 17 +----------------
> target/mips/cpu.c | 13 +------------
> target/moxie/cpu.c | 17 +----------------
> target/openrisc/cpu.c | 17 +----------------
> target/riscv/cpu.c | 17 +----------------
> target/s390x/cpu.c | 2 +-
> target/s390x/cpu_models.c | 10 ----------
> target/tricore/cpu.c | 17 +----------------
> target/unicore32/cpu.c | 17 +----------------
> target/xtensa/cpu.c | 17 +----------------
> 14 files changed, 12 insertions(+), 178 deletions(-)
>
> diff --git a/target/s390x/internal.h b/target/s390x/internal.h
> index 3b4855c175..789d6444c9 100644
> --- a/target/s390x/internal.h
> +++ b/target/s390x/internal.h
> @@ -256,7 +256,6 @@ static inline void s390_cpu_unhalt(S390CPU *cpu)
> void s390_cpu_model_register_props(Object *obj);
> void s390_cpu_model_class_register_props(ObjectClass *oc);
> void s390_realize_cpu_model(CPUState *cs, Error **errp);
> -ObjectClass *s390_cpu_class_by_name(const char *name);
>
>
> /* excp_helper.c */
> diff --git a/target/arm/cpu.c b/target/arm/cpu.c
> index dcc65093d9..4f0ed3715d 100644
> --- a/target/arm/cpu.c
> +++ b/target/arm/cpu.c
> @@ -1208,21 +1208,6 @@ static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
> acc->parent_realize(dev, errp);
> }
>
> -static ObjectClass *arm_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(ARM_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (!oc || !object_class_dynamic_cast(oc, TYPE_ARM_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> /* CPU models. These are not needed for the AArch64 linux-user build. */
> #if !defined(CONFIG_USER_ONLY) || !defined(TARGET_AARCH64)
>
> @@ -2142,7 +2127,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data)
> acc->parent_reset = cc->reset;
> cc->reset = arm_cpu_reset;
>
> - cc->class_by_name = arm_cpu_class_by_name;
> + cc->class_name_format = ARM_CPU_TYPE_NAME("%s");
> cc->has_work = arm_cpu_has_work;
> cc->cpu_exec_interrupt = arm_cpu_exec_interrupt;
> cc->dump_state = arm_cpu_dump_state;
> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> index d6bb57d210..18adef524f 100644
> --- a/target/i386/cpu.c
> +++ b/target/i386/cpu.c
> @@ -1391,15 +1391,6 @@ static char *x86_cpu_type_name(const char *model_name)
> return g_strdup_printf(X86_CPU_TYPE_NAME("%s"), model_name);
> }
>
> -static ObjectClass *x86_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename = x86_cpu_type_name(cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - return oc;
> -}
> -
> static char *x86_cpu_class_get_model_name(X86CPUClass *cc)
> {
> const char *class_name = object_class_get_name(OBJECT_CLASS(cc));
> @@ -5851,7 +5842,7 @@ static void x86_cpu_common_class_init(ObjectClass *oc, void *data)
> cc->reset = x86_cpu_reset;
> cc->reset_dump_flags = CPU_DUMP_FPU | CPU_DUMP_CCOP;
>
> - cc->class_by_name = x86_cpu_class_by_name;
> + cc->class_name_format = X86_CPU_TYPE_NAME("%s");
> cc->parse_features = x86_cpu_parse_featurestr;
> cc->has_work = x86_cpu_has_work;
> #ifdef CONFIG_TCG
> diff --git a/target/lm32/cpu.c b/target/lm32/cpu.c
> index b7499cb627..675bea10e8 100644
> --- a/target/lm32/cpu.c
> +++ b/target/lm32/cpu.c
> @@ -201,21 +201,6 @@ static void lm32_full_cpu_initfn(Object *obj)
> | LM32_FEATURE_CYCLE_COUNT;
> }
>
> -static ObjectClass *lm32_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(LM32_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_LM32_CPU) ||
> - object_class_is_abstract(oc))) {
> - oc = NULL;
> - }
> - return oc;
> -}
> -
> static void lm32_cpu_class_init(ObjectClass *oc, void *data)
> {
> LM32CPUClass *lcc = LM32_CPU_CLASS(oc);
> @@ -227,7 +212,7 @@ static void lm32_cpu_class_init(ObjectClass *oc, void *data)
> lcc->parent_reset = cc->reset;
> cc->reset = lm32_cpu_reset;
>
> - cc->class_by_name = lm32_cpu_class_by_name;
> + cc->class_name_format = LM32_CPU_TYPE_NAME("%s");
> cc->has_work = lm32_cpu_has_work;
> cc->do_interrupt = lm32_cpu_do_interrupt;
> cc->cpu_exec_interrupt = lm32_cpu_exec_interrupt;
> diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
> index 582e3a73b3..b582c8d980 100644
> --- a/target/m68k/cpu.c
> +++ b/target/m68k/cpu.c
> @@ -81,21 +81,6 @@ static void m68k_cpu_disas_set_info(CPUState *s, disassemble_info *info)
>
> /* CPU models */
>
> -static ObjectClass *m68k_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(M68K_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (object_class_dynamic_cast(oc, TYPE_M68K_CPU) == NULL ||
> - object_class_is_abstract(oc))) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void m5206_cpu_initfn(Object *obj)
> {
> M68kCPU *cpu = M68K_CPU(obj);
> @@ -261,7 +246,7 @@ static void m68k_cpu_class_init(ObjectClass *c, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = m68k_cpu_reset;
>
> - cc->class_by_name = m68k_cpu_class_by_name;
> + cc->class_name_format = M68K_CPU_TYPE_NAME("%s");
> cc->has_work = m68k_cpu_has_work;
> cc->do_interrupt = m68k_cpu_do_interrupt;
> cc->cpu_exec_interrupt = m68k_cpu_exec_interrupt;
> diff --git a/target/mips/cpu.c b/target/mips/cpu.c
> index e217fb3e36..c3b30f5562 100644
> --- a/target/mips/cpu.c
> +++ b/target/mips/cpu.c
> @@ -166,17 +166,6 @@ static char *mips_cpu_type_name(const char *cpu_model)
> return g_strdup_printf(MIPS_CPU_TYPE_NAME("%s"), cpu_model);
> }
>
> -static ObjectClass *mips_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = mips_cpu_type_name(cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - return oc;
> -}
> -
> static void mips_cpu_class_init(ObjectClass *c, void *data)
> {
> MIPSCPUClass *mcc = MIPS_CPU_CLASS(c);
> @@ -188,7 +177,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = mips_cpu_reset;
>
> - cc->class_by_name = mips_cpu_class_by_name;
> + cc->class_name_format = MIPS_CPU_TYPE_NAME("%s");
> cc->has_work = mips_cpu_has_work;
> cc->do_interrupt = mips_cpu_do_interrupt;
> cc->cpu_exec_interrupt = mips_cpu_exec_interrupt;
> diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c
> index 46434e65ba..8e7768e576 100644
> --- a/target/moxie/cpu.c
> +++ b/target/moxie/cpu.c
> @@ -80,21 +80,6 @@ static void moxie_cpu_initfn(Object *obj)
> cs->env_ptr = &cpu->env;
> }
>
> -static ObjectClass *moxie_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(MOXIE_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_MOXIE_CPU) ||
> - object_class_is_abstract(oc))) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void moxie_cpu_class_init(ObjectClass *oc, void *data)
> {
> DeviceClass *dc = DEVICE_CLASS(oc);
> @@ -106,7 +91,7 @@ static void moxie_cpu_class_init(ObjectClass *oc, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = moxie_cpu_reset;
>
> - cc->class_by_name = moxie_cpu_class_by_name;
> + cc->class_name_format = MOXIE_CPU_TYPE_NAME("%s");
>
> cc->has_work = moxie_cpu_has_work;
> cc->do_interrupt = moxie_cpu_do_interrupt;
> diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c
> index 541b2a66c7..f78b5a2cd8 100644
> --- a/target/openrisc/cpu.c
> +++ b/target/openrisc/cpu.c
> @@ -99,21 +99,6 @@ static void openrisc_cpu_initfn(Object *obj)
>
> /* CPU models */
>
> -static ObjectClass *openrisc_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(OPENRISC_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_OPENRISC_CPU) ||
> - object_class_is_abstract(oc))) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void or1200_initfn(Object *obj)
> {
> OpenRISCCPU *cpu = OPENRISC_CPU(obj);
> @@ -140,7 +125,7 @@ static void openrisc_cpu_class_init(ObjectClass *oc, void *data)
> occ->parent_reset = cc->reset;
> cc->reset = openrisc_cpu_reset;
>
> - cc->class_by_name = openrisc_cpu_class_by_name;
> + cc->class_name_format = OPENRISC_CPU_TYPE_NAME("%s");
> cc->has_work = openrisc_cpu_has_work;
> cc->do_interrupt = openrisc_cpu_do_interrupt;
> cc->cpu_exec_interrupt = openrisc_cpu_exec_interrupt;
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 5e97a83c80..7bd32966bc 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -175,21 +175,6 @@ static void rv64imacu_nommu_cpu_init(Object *obj)
>
> #endif
>
> -static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void riscv_cpu_dump_state(CPUState *cs, FILE *f,
> fprintf_function cpu_fprintf, int flags)
> {
> @@ -335,7 +320,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data)
> mcc->parent_reset = cc->reset;
> cc->reset = riscv_cpu_reset;
>
> - cc->class_by_name = riscv_cpu_class_by_name;
> + cc->class_name_format = RISCV_CPU_TYPE_NAME("%s");
> cc->has_work = riscv_cpu_has_work;
> cc->do_interrupt = riscv_cpu_do_interrupt;
> cc->cpu_exec_interrupt = riscv_cpu_exec_interrupt;
> diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c
> index 698dd9cb82..4ecd3f60be 100644
> --- a/target/s390x/cpu.c
> +++ b/target/s390x/cpu.c
> @@ -461,7 +461,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *data)
> scc->cpu_reset = s390_cpu_reset;
> scc->initial_cpu_reset = s390_cpu_initial_reset;
> cc->reset = s390_cpu_full_reset;
> - cc->class_by_name = s390_cpu_class_by_name,
> + cc->class_name_format = S390_CPU_TYPE_NAME("%s");
> cc->has_work = s390_cpu_has_work;
> #ifdef CONFIG_TCG
> cc->do_interrupt = s390_cpu_do_interrupt;
> diff --git a/target/s390x/cpu_models.c b/target/s390x/cpu_models.c
> index 391698595f..fa248c5b3f 100644
> --- a/target/s390x/cpu_models.c
> +++ b/target/s390x/cpu_models.c
> @@ -1278,16 +1278,6 @@ static char *s390_base_cpu_type_name(const char *model_name)
> return g_strdup_printf(S390_CPU_TYPE_NAME("%s-base"), model_name);
> }
>
> -ObjectClass *s390_cpu_class_by_name(const char *name)
> -{
> - char *typename = s390_cpu_type_name(name);
> - ObjectClass *oc;
> -
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - return oc;
> -}
> -
> static const TypeInfo qemu_s390_cpu_type_info = {
> .name = S390_CPU_TYPE_NAME("qemu"),
> .parent = TYPE_S390_CPU,
> diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c
> index e8d37e4040..81460f6aed 100644
> --- a/target/tricore/cpu.c
> +++ b/target/tricore/cpu.c
> @@ -111,21 +111,6 @@ static void tricore_cpu_initfn(Object *obj)
> cs->env_ptr = env;
> }
>
> -static ObjectClass *tricore_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(TRICORE_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (!oc || !object_class_dynamic_cast(oc, TYPE_TRICORE_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void tc1796_initfn(Object *obj)
> {
> TriCoreCPU *cpu = TRICORE_CPU(obj);
> @@ -158,7 +143,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data)
>
> mcc->parent_reset = cc->reset;
> cc->reset = tricore_cpu_reset;
> - cc->class_by_name = tricore_cpu_class_by_name;
> + cc->class_name_format = TRICORE_CPU_TYPE_NAME("%s");
> cc->has_work = tricore_cpu_has_work;
>
> cc->dump_state = tricore_cpu_dump_state;
> diff --git a/target/unicore32/cpu.c b/target/unicore32/cpu.c
> index 2b49d1ca40..f7b3dd2bb1 100644
> --- a/target/unicore32/cpu.c
> +++ b/target/unicore32/cpu.c
> @@ -40,21 +40,6 @@ static inline void set_feature(CPUUniCore32State *env, int feature)
>
> /* CPU models */
>
> -static ObjectClass *uc32_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(UNICORE32_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_UNICORE32_CPU) ||
> - object_class_is_abstract(oc))) {
> - oc = NULL;
> - }
> - return oc;
> -}
> -
> static void unicore_ii_cpu_initfn(Object *obj)
> {
> UniCore32CPU *cpu = UNICORE32_CPU(obj);
> @@ -132,7 +117,7 @@ static void uc32_cpu_class_init(ObjectClass *oc, void *data)
> device_class_set_parent_realize(dc, uc32_cpu_realizefn,
> &ucc->parent_realize);
>
> - cc->class_by_name = uc32_cpu_class_by_name;
> + cc->class_name_format = UNICORE32_CPU_TYPE_NAME("%s");
> cc->has_work = uc32_cpu_has_work;
> cc->do_interrupt = uc32_cpu_do_interrupt;
> cc->cpu_exec_interrupt = uc32_cpu_exec_interrupt;
> diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c
> index a54dbe4260..2278a46989 100644
> --- a/target/xtensa/cpu.c
> +++ b/target/xtensa/cpu.c
> @@ -90,21 +90,6 @@ static void xtensa_cpu_reset(CPUState *s)
> #endif
> }
>
> -static ObjectClass *xtensa_cpu_class_by_name(const char *cpu_model)
> -{
> - ObjectClass *oc;
> - char *typename;
> -
> - typename = g_strdup_printf(XTENSA_CPU_TYPE_NAME("%s"), cpu_model);
> - oc = object_class_by_name(typename);
> - g_free(typename);
> - if (oc == NULL || !object_class_dynamic_cast(oc, TYPE_XTENSA_CPU) ||
> - object_class_is_abstract(oc)) {
> - return NULL;
> - }
> - return oc;
> -}
> -
> static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
> {
> XtensaCPU *cpu = XTENSA_CPU(cs);
> @@ -172,7 +157,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void *data)
> xcc->parent_reset = cc->reset;
> cc->reset = xtensa_cpu_reset;
>
> - cc->class_by_name = xtensa_cpu_class_by_name;
> + cc->class_name_format = XTENSA_CPU_TYPE_NAME("%s");
> cc->has_work = xtensa_cpu_has_work;
> cc->do_interrupt = xtensa_cpu_do_interrupt;
> cc->cpu_exec_interrupt = xtensa_cpu_exec_interrupt;
> --
> 2.18.0.rc1.1.g3f1ff2140
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string
2019-04-19 6:14 ` [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
@ 2019-04-19 21:00 ` Alistair Francis
2019-04-19 21:00 ` Alistair Francis
1 sibling, 1 reply; 28+ messages in thread
From: Alistair Francis @ 2019-04-19 21:00 UTC (permalink / raw)
To: Eduardo Habkost
Cc: qemu-devel@nongnu.org Developers, Peter Maydell, open list:RISC-V,
Sagar Karandikar, Bastian Koppelmann, Palmer Dabbelt,
Alistair Francis, Igor Mammedov, Richard Henderson
On Thu, Apr 18, 2019 at 11:20 PM Eduardo Habkost <ehabkost@redhat.com> wrote:
>
> CPUClass::class_by_name is called after the CPU model name and
> options were already split, there's no need to split the string
> again.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Alistair Francis <Alistair.Francis@wdc.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: qemu-riscv@nongnu.org
> ---
> target/riscv/cpu.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index d61bce6d55..5e97a83c80 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -179,12 +179,9 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
> {
> ObjectClass *oc;
> char *typename;
> - char **cpuname;
>
> - cpuname = g_strsplit(cpu_model, ",", 1);
> - typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpuname[0]);
> + typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
> oc = object_class_by_name(typename);
> - g_strfreev(cpuname);
> g_free(typename);
> if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
> object_class_is_abstract(oc)) {
> --
> 2.18.0.rc1.1.g3f1ff2140
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string
2019-04-19 21:00 ` Alistair Francis
@ 2019-04-19 21:00 ` Alistair Francis
0 siblings, 0 replies; 28+ messages in thread
From: Alistair Francis @ 2019-04-19 21:00 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, open list:RISC-V, Sagar Karandikar,
Bastian Koppelmann, Palmer Dabbelt,
qemu-devel@nongnu.org Developers, Alistair Francis, Igor Mammedov,
Richard Henderson
On Thu, Apr 18, 2019 at 11:20 PM Eduardo Habkost <ehabkost@redhat.com> wrote:
>
> CPUClass::class_by_name is called after the CPU model name and
> options were already split, there's no need to split the string
> again.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
> Cc: Palmer Dabbelt <palmer@sifive.com>
> Cc: Alistair Francis <Alistair.Francis@wdc.com>
> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu>
> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
> Cc: qemu-riscv@nongnu.org
> ---
> target/riscv/cpu.c | 5 +----
> 1 file changed, 1 insertion(+), 4 deletions(-)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index d61bce6d55..5e97a83c80 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -179,12 +179,9 @@ static ObjectClass *riscv_cpu_class_by_name(const char *cpu_model)
> {
> ObjectClass *oc;
> char *typename;
> - char **cpuname;
>
> - cpuname = g_strsplit(cpu_model, ",", 1);
> - typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpuname[0]);
> + typename = g_strdup_printf(RISCV_CPU_TYPE_NAME("%s"), cpu_model);
> oc = object_class_by_name(typename);
> - g_strfreev(cpuname);
> g_free(typename);
> if (!oc || !object_class_dynamic_cast(oc, TYPE_RISCV_CPU) ||
> object_class_is_abstract(oc)) {
> --
> 2.18.0.rc1.1.g3f1ff2140
>
>
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format
2019-04-19 6:14 ` [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
@ 2019-05-06 11:42 ` Markus Armbruster
2019-05-08 5:52 ` Markus Armbruster
1 sibling, 1 reply; 28+ messages in thread
From: Markus Armbruster @ 2019-05-06 11:42 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Richard Henderson, qemu-devel, Igor Mammedov
Eduardo Habkost <ehabkost@redhat.com> writes:
> Instead of requiring every architecture to implement a
> class_by_name function, let them set a format string at
> CPUClass::class_name_format.
>
> This will let us get rid of at least 16 class_by_name functions
> in the next commits.
>
> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
> ---
> include/qom/cpu.h | 12 ++++++++++++
> qom/cpu.c | 18 ++++++++++++++++--
> 2 files changed, 28 insertions(+), 2 deletions(-)
>
> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
> index fefd5c26b0..eda6a46b82 100644
> --- a/include/qom/cpu.h
> +++ b/include/qom/cpu.h
> @@ -163,7 +163,19 @@ typedef struct CPUClass {
> DeviceClass parent_class;
> /*< public >*/
>
> + /* The following fields configure CPU model name -> QOM type translation: */
> +
> + /*
> + * arch-specific CPU model -> QOM type translation function.
> + * Optional if @class_name_format is set.
> + */
> ObjectClass *(*class_by_name)(const char *cpu_model);
> + /*
> + * Format string for g_strdup_printf(), used to generate the CPU
> + * class name.
Please document acceptable conversion specifiers.
> + */
> + const char *class_name_format;
> +
> void (*parse_features)(const char *typename, char *str, Error **errp);
>
> void (*reset)(CPUState *cpu);
> diff --git a/qom/cpu.c b/qom/cpu.c
> index b971a56242..1fa64941b6 100644
> --- a/qom/cpu.c
> +++ b/qom/cpu.c
> @@ -286,9 +286,23 @@ static bool cpu_common_has_work(CPUState *cs)
> CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model)
> {
> CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
> + ObjectClass *oc;
> + char *class_name;
>
> - assert(cpu_model && cc->class_by_name);
> - return CPU_CLASS(cc->class_by_name(cpu_model));
> + assert(cpu_model);
> + if (cc->class_by_name) {
> + return CPU_CLASS(cc->class_by_name(cpu_model));
> + }
> +
> + assert(cc->class_name_format);
> + class_name = g_strdup_printf(cc->class_name_format, cpu_model);
Defeats -Wformat. Triggers -Wformat-nonliteral, which we don't use, I
presume. Observation, not objection.
cc->class_name_format must contain exactly one conversion specifier,
which must take a char *.
> + oc = object_class_by_name(class_name);
> + g_free(class_name);
> + if (!oc || !object_class_dynamic_cast(oc, typename) ||
> + object_class_is_abstract(oc)) {
> + return NULL;
> + }
> + return CPU_CLASS(oc);
> }
>
> static void cpu_common_parse_features(const char *typename, char *features,
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
` (7 preceding siblings ...)
2019-04-19 6:14 ` [Qemu-devel] [PATCH 7/7] cpu: Set fixed class name on " Eduardo Habkost
@ 2019-05-06 11:53 ` Markus Armbruster
2019-05-06 19:53 ` Eduardo Habkost
8 siblings, 1 reply; 28+ messages in thread
From: Markus Armbruster @ 2019-05-06 11:53 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Richard Henderson, qemu-devel, Igor Mammedov
Eduardo Habkost <ehabkost@redhat.com> writes:
> This series adds a new CPUClass::class_name_format field, which
> allows us to delete 16 of the 21 *_cpu_class_by_name() functions
> that exist today.
Which five remain, and why?
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
2019-05-06 11:53 ` [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Markus Armbruster
@ 2019-05-06 19:53 ` Eduardo Habkost
2019-05-08 8:34 ` Markus Armbruster
0 siblings, 1 reply; 28+ messages in thread
From: Eduardo Habkost @ 2019-05-06 19:53 UTC (permalink / raw)
To: Markus Armbruster
Cc: Peter Maydell, Richard Henderson, qemu-devel, Igor Mammedov
On Mon, May 06, 2019 at 01:53:28PM +0200, Markus Armbruster wrote:
> Eduardo Habkost <ehabkost@redhat.com> writes:
>
> > This series adds a new CPUClass::class_name_format field, which
> > allows us to delete 16 of the 21 *_cpu_class_by_name() functions
> > that exist today.
>
> Which five remain, and why?
alpha_cpu_class_by_name:
* Translates aliases based on alpha_cpu_aliases;
* Falls back to "ev67" unconditionally
(there's a "TODO: remove match everything nonsense" comment).
cris_cpu_class_by_name:
* Translates "any" alias to "crisv32" if CONFIG_USER_ONLY.
ppc_cpu_class_by_name:
* Supports lookup by PVR if CPU model is a 8 digit hex number;
* Converts CPU model to lowercase.
superh_cpu_class_by_name:
* Translates "any" alias to TYPE_SH7750R_CPU.
sparc_cpu_class_by_name:
* Replaces whitespaces with '-' on CPU model name.
--
Eduardo
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format
2019-05-06 11:42 ` Markus Armbruster
@ 2019-05-08 5:52 ` Markus Armbruster
0 siblings, 0 replies; 28+ messages in thread
From: Markus Armbruster @ 2019-05-08 5:52 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Richard Henderson, qemu-devel, Igor Mammedov
Markus Armbruster <armbru@redhat.com> writes:
> Eduardo Habkost <ehabkost@redhat.com> writes:
>
>> Instead of requiring every architecture to implement a
>> class_by_name function, let them set a format string at
>> CPUClass::class_name_format.
>>
>> This will let us get rid of at least 16 class_by_name functions
>> in the next commits.
>>
>> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
>> ---
>> include/qom/cpu.h | 12 ++++++++++++
>> qom/cpu.c | 18 ++++++++++++++++--
>> 2 files changed, 28 insertions(+), 2 deletions(-)
>>
>> diff --git a/include/qom/cpu.h b/include/qom/cpu.h
>> index fefd5c26b0..eda6a46b82 100644
>> --- a/include/qom/cpu.h
>> +++ b/include/qom/cpu.h
>> @@ -163,7 +163,19 @@ typedef struct CPUClass {
>> DeviceClass parent_class;
>> /*< public >*/
>>
>> + /* The following fields configure CPU model name -> QOM type translation: */
>> +
>> + /*
>> + * arch-specific CPU model -> QOM type translation function.
>> + * Optional if @class_name_format is set.
>> + */
>> ObjectClass *(*class_by_name)(const char *cpu_model);
>> + /*
>> + * Format string for g_strdup_printf(), used to generate the CPU
>> + * class name.
>
> Please document acceptable conversion specifiers.
>
>> + */
>> + const char *class_name_format;
>> +
>> void (*parse_features)(const char *typename, char *str, Error **errp);
>>
>> void (*reset)(CPUState *cpu);
>> diff --git a/qom/cpu.c b/qom/cpu.c
>> index b971a56242..1fa64941b6 100644
>> --- a/qom/cpu.c
>> +++ b/qom/cpu.c
>> @@ -286,9 +286,23 @@ static bool cpu_common_has_work(CPUState *cs)
>> CPUClass *cpu_class_by_name(const char *typename, const char *cpu_model)
>> {
>> CPUClass *cc = CPU_CLASS(object_class_by_name(typename));
>> + ObjectClass *oc;
>> + char *class_name;
>>
>> - assert(cpu_model && cc->class_by_name);
>> - return CPU_CLASS(cc->class_by_name(cpu_model));
>> + assert(cpu_model);
>> + if (cc->class_by_name) {
>> + return CPU_CLASS(cc->class_by_name(cpu_model));
>> + }
>> +
>> + assert(cc->class_name_format);
>> + class_name = g_strdup_printf(cc->class_name_format, cpu_model);
>
> Defeats -Wformat. Triggers -Wformat-nonliteral, which we don't use, I
> presume. Observation, not objection.
>
> cc->class_name_format must contain exactly one conversion specifier,
> which must take a char *.
s/exactly one/at most one/
PATCH 7 defines formats without a conversion specifier.
>> + oc = object_class_by_name(class_name);
>> + g_free(class_name);
>> + if (!oc || !object_class_dynamic_cast(oc, typename) ||
>> + object_class_is_abstract(oc)) {
>> + return NULL;
>> + }
>> + return CPU_CLASS(oc);
>> }
>>
>> static void cpu_common_parse_features(const char *typename, char *features,
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
2019-05-06 19:53 ` Eduardo Habkost
@ 2019-05-08 8:34 ` Markus Armbruster
2019-05-08 19:46 ` Eduardo Habkost
2019-05-09 15:46 ` Igor Mammedov
0 siblings, 2 replies; 28+ messages in thread
From: Markus Armbruster @ 2019-05-08 8:34 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Igor Mammedov, qemu-devel, Richard Henderson
Eduardo Habkost <ehabkost@redhat.com> writes:
> On Mon, May 06, 2019 at 01:53:28PM +0200, Markus Armbruster wrote:
>> Eduardo Habkost <ehabkost@redhat.com> writes:
>>
>> > This series adds a new CPUClass::class_name_format field, which
>> > allows us to delete 16 of the 21 *_cpu_class_by_name() functions
>> > that exist today.
>>
>> Which five remain, and why?
>
> alpha_cpu_class_by_name:
> * Translates aliases based on alpha_cpu_aliases;
> * Falls back to "ev67" unconditionally
> (there's a "TODO: remove match everything nonsense" comment).
>
> cris_cpu_class_by_name:
> * Translates "any" alias to "crisv32" if CONFIG_USER_ONLY.
>
> ppc_cpu_class_by_name:
> * Supports lookup by PVR if CPU model is a 8 digit hex number;
> * Converts CPU model to lowercase.
>
> superh_cpu_class_by_name:
> * Translates "any" alias to TYPE_SH7750R_CPU.
>
> sparc_cpu_class_by_name:
> * Replaces whitespaces with '-' on CPU model name.
I'm of course asking because I wonder whether we can dumb down this CPU
naming business to something simpler and more regular.
Let's review what we have.
For all <TARGET> in target/*:
* arm i386 lm32 m68k mips moxie openrisc riscv s390x s390x tricore
unicore32 xtensa
CPU type name format is <TARGET>_CPU_TYPE_NAME("%s"), which boils down
to:
- arm lm32 m68k moxie riscv s390x tricore unicore32 xtensa
"%s-<TARGET>-cpu"
- openrisc
"%s-or1k-cpu"
- i386
"%s-x86_64-cpu" #ifdef TARGET_X86_64
"%s-i386-cpu" #else
- mips
"%s-mips64-cpu" #ifdef TARGET_MIPS64
"%s-mips-cpu" #else
The %s gets replaced by the user's cpu model.
* hppa microblaze nios2 tilegx
CPU type name format is <TARGET>-cpu. The user's cpu model seems
silently ignored.
* alpha cris ppc sh4 sparc
No format, using ->class_by_name()
- alpha
CPU type name format is "%s-alpha-cpu".
alpha_cpu_class_by_name() recognizes the full name, the full name
without "-alpha-cpu" suffix, and a bunch of aliases.
- cris
CPU type name format is "%s-cris-cpu".
cris_cpu_class_by_name() recognizes the name without the "-cris-cpu"
suffix, plus "any" as alias for "crisv32-cris-cpu" #ifdef
CONFIG_USER_ONLY (this is the default CPU type for machine
"axis-dev88"; the other machine "none" has no default).
- ppc
CPU type name format is
"%s-powerpc64-cpu" #ifdef TARGET_PPC64
"%s-powerpc-cpu" #else
ppc_cpu_class_by_name() recognizes the name without the suffix, plus
the CPU type's PVR (8 digit hex number), plus a bunch of (case
insensitive) aliases.
- sh4
CPU type name format is "%s-superh-cpu".
superh_cpu_class_by_name() recognizes the name without the suffix,
plus "any" as alias for "sh7750r-superh-cpu" (this is the default
CPU type for machine "shix"; machines "r2d" defaults to "sh7751r",
and "none" has no default).
- sparc
CPU type name format is
"%s-sparc64-cpu" #ifdef TARGET_SPARC64
"%s-sparc-cpu" #else
sparc_cpu_class_by_name() recognizes the name without the suffix,
mapping any spaces in the user's cpu model to '-'.
Observations:
* The CPU type name format is generally "%s-T-cpu", where T is either
<TARGET> or <TARGET>64.
Exceptions:
- openrisc, sh4 uses or1k, superh instead. Looks pointless to me.
- i386 uses x86_64 instead of i38664. Makes sense.
- hppa, microblaze, nios2 and tilegx use CPU type name format "T-cpu",
ignoring the user's cpu model. These exceptions looks pointless to
me.
* The user's CPU model is generally the "%s" part of the format.
Exceptions:
- alpha additionaly recognizes full type names. If that's useful for
alpha (I'm not sure it is), why isn't it useful for all other
targets?
- cris and sh4 additionaly recognize an "any" alias, cris only #ifdef
CONFIG_USER_ONLY.
Until PATCH 4, arm also recognizes an "any" alias #ifdef
CONFIG_USER_ONLY. PATCH 4 drops that, because it's redundant with
the "any" CPU, which is a copy instead of an alias. Sure we want to
do have different targets do "any" in different ways?
See aliases below.
- ppc additionaly recognizes PVR aliases and additional (case
insensitive) aliases. Feels overengineered to me. See aliases
below.
- sparc additionally recognizes aliases with ' ' instead of '-'.
Feels pointless to me. See aliases below.
* What about deprecating pointless exceptions?
* Aliases
We have several targets roll their own CPU name aliases code.
Assuming aliases are here to stay (i.e. we're not deprecating all of
them): what about letting each CPU type specify a set of aliases, so
we can recognize them in generic code?
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
2019-05-08 8:34 ` Markus Armbruster
@ 2019-05-08 19:46 ` Eduardo Habkost
2019-05-09 5:55 ` Markus Armbruster
2019-05-09 15:46 ` Igor Mammedov
1 sibling, 1 reply; 28+ messages in thread
From: Eduardo Habkost @ 2019-05-08 19:46 UTC (permalink / raw)
To: Markus Armbruster
Cc: Peter Maydell, Igor Mammedov, qemu-devel, Richard Henderson
On Wed, May 08, 2019 at 10:34:44AM +0200, Markus Armbruster wrote:
> Eduardo Habkost <ehabkost@redhat.com> writes:
>
> > On Mon, May 06, 2019 at 01:53:28PM +0200, Markus Armbruster wrote:
> >> Eduardo Habkost <ehabkost@redhat.com> writes:
> >>
> >> > This series adds a new CPUClass::class_name_format field, which
> >> > allows us to delete 16 of the 21 *_cpu_class_by_name() functions
> >> > that exist today.
> >>
> >> Which five remain, and why?
> >
> > alpha_cpu_class_by_name:
> > * Translates aliases based on alpha_cpu_aliases;
> > * Falls back to "ev67" unconditionally
> > (there's a "TODO: remove match everything nonsense" comment).
> >
> > cris_cpu_class_by_name:
> > * Translates "any" alias to "crisv32" if CONFIG_USER_ONLY.
> >
> > ppc_cpu_class_by_name:
> > * Supports lookup by PVR if CPU model is a 8 digit hex number;
> > * Converts CPU model to lowercase.
> >
> > superh_cpu_class_by_name:
> > * Translates "any" alias to TYPE_SH7750R_CPU.
> >
> > sparc_cpu_class_by_name:
> > * Replaces whitespaces with '-' on CPU model name.
>
> I'm of course asking because I wonder whether we can dumb down this CPU
> naming business to something simpler and more regular.
We can, but that's not on my list of priorities. Any volunteers?
>
[...]
> * Aliases
>
> We have several targets roll their own CPU name aliases code.
> Assuming aliases are here to stay (i.e. we're not deprecating all of
> them): what about letting each CPU type specify a set of aliases, so
> we can recognize them in generic code?
Yes. I considered adding alias support to generic code, but
decided to do this one step at a time.
--
Eduardo
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
2019-05-08 19:46 ` Eduardo Habkost
@ 2019-05-09 5:55 ` Markus Armbruster
0 siblings, 0 replies; 28+ messages in thread
From: Markus Armbruster @ 2019-05-09 5:55 UTC (permalink / raw)
To: Eduardo Habkost
Cc: Peter Maydell, Richard Henderson, qemu-devel, Igor Mammedov
Eduardo Habkost <ehabkost@redhat.com> writes:
> On Wed, May 08, 2019 at 10:34:44AM +0200, Markus Armbruster wrote:
>> Eduardo Habkost <ehabkost@redhat.com> writes:
>>
>> > On Mon, May 06, 2019 at 01:53:28PM +0200, Markus Armbruster wrote:
>> >> Eduardo Habkost <ehabkost@redhat.com> writes:
>> >>
>> >> > This series adds a new CPUClass::class_name_format field, which
>> >> > allows us to delete 16 of the 21 *_cpu_class_by_name() functions
>> >> > that exist today.
>> >>
>> >> Which five remain, and why?
>> >
>> > alpha_cpu_class_by_name:
>> > * Translates aliases based on alpha_cpu_aliases;
>> > * Falls back to "ev67" unconditionally
>> > (there's a "TODO: remove match everything nonsense" comment).
>> >
>> > cris_cpu_class_by_name:
>> > * Translates "any" alias to "crisv32" if CONFIG_USER_ONLY.
>> >
>> > ppc_cpu_class_by_name:
>> > * Supports lookup by PVR if CPU model is a 8 digit hex number;
>> > * Converts CPU model to lowercase.
>> >
>> > superh_cpu_class_by_name:
>> > * Translates "any" alias to TYPE_SH7750R_CPU.
>> >
>> > sparc_cpu_class_by_name:
>> > * Replaces whitespaces with '-' on CPU model name.
>>
>> I'm of course asking because I wonder whether we can dumb down this CPU
>> naming business to something simpler and more regular.
>
> We can, but that's not on my list of priorities. Any volunteers?
Fair enough. Except for...
>>
> [...]
>> Observations:
>>
>> * The CPU type name format is generally "%s-T-cpu", where T is either
>> <TARGET> or <TARGET>64.
>>
>> Exceptions:
>>
>> - openrisc, sh4 uses or1k, superh instead. Looks pointless to me.
>>
>> - i386 uses x86_64 instead of i38664. Makes sense.
>>
>> - hppa, microblaze, nios2 and tilegx use CPU type name format "T-cpu",
>> ignoring the user's cpu model. These exceptions looks pointless to
>> me.
>>
>> * The user's CPU model is generally the "%s" part of the format.
>>
>> Exceptions:
>>
>> - alpha additionaly recognizes full type names. If that's useful for
>> alpha (I'm not sure it is), why isn't it useful for all other
>> targets?
>>
>> - cris and sh4 additionaly recognize an "any" alias, cris only #ifdef
>> CONFIG_USER_ONLY.
>>
>> Until PATCH 4, arm also recognizes an "any" alias #ifdef
>> CONFIG_USER_ONLY. PATCH 4 drops that, because it's redundant with
>> the "any" CPU, which is a copy instead of an alias. Sure we want to
>> do have different targets do "any" in different ways?
>>
>> See aliases below.
>>
>> - ppc additionaly recognizes PVR aliases and additional (case
>> insensitive) aliases. Feels overengineered to me. See aliases
>> below.
>>
>> - sparc additionally recognizes aliases with ' ' instead of '-'.
>> Feels pointless to me. See aliases below.
... this, perhaps:
>> * What about deprecating pointless exceptions?
Deprecating unwanted stuff now is likely to make a later cleanup so much
easier.
>> * Aliases
>>
>> We have several targets roll their own CPU name aliases code.
>> Assuming aliases are here to stay (i.e. we're not deprecating all of
>> them): what about letting each CPU type specify a set of aliases, so
>> we can recognize them in generic code?
>
> Yes. I considered adding alias support to generic code, but
> decided to do this one step at a time.
Okay. Consider adding suitable TODO comments.
^ permalink raw reply [flat|nested] 28+ messages in thread
* Re: [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions
2019-05-08 8:34 ` Markus Armbruster
2019-05-08 19:46 ` Eduardo Habkost
@ 2019-05-09 15:46 ` Igor Mammedov
1 sibling, 0 replies; 28+ messages in thread
From: Igor Mammedov @ 2019-05-09 15:46 UTC (permalink / raw)
To: Markus Armbruster
Cc: Peter Maydell, Eduardo Habkost, qemu-devel, qemu-ppc,
David Gibson, Richard Henderson
On Wed, 08 May 2019 10:34:44 +0200
Markus Armbruster <armbru@redhat.com> wrote:
> Eduardo Habkost <ehabkost@redhat.com> writes:
>
> > On Mon, May 06, 2019 at 01:53:28PM +0200, Markus Armbruster wrote:
> >> Eduardo Habkost <ehabkost@redhat.com> writes:
> >>
> >> > This series adds a new CPUClass::class_name_format field, which
> >> > allows us to delete 16 of the 21 *_cpu_class_by_name() functions
> >> > that exist today.
> >>
> >> Which five remain, and why?
> >
> > alpha_cpu_class_by_name:
> > * Translates aliases based on alpha_cpu_aliases;
> > * Falls back to "ev67" unconditionally
> > (there's a "TODO: remove match everything nonsense" comment).
> >
> > cris_cpu_class_by_name:
> > * Translates "any" alias to "crisv32" if CONFIG_USER_ONLY.
> >
> > ppc_cpu_class_by_name:
> > * Supports lookup by PVR if CPU model is a 8 digit hex number;
> > * Converts CPU model to lowercase.
> >
> > superh_cpu_class_by_name:
> > * Translates "any" alias to TYPE_SH7750R_CPU.
> >
> > sparc_cpu_class_by_name:
> > * Replaces whitespaces with '-' on CPU model name.
>
> I'm of course asking because I wonder whether we can dumb down this CPU
> naming business to something simpler and more regular.
>
> Let's review what we have.
>
> For all <TARGET> in target/*:
>
> * arm i386 lm32 m68k mips moxie openrisc riscv s390x s390x tricore
> unicore32 xtensa
>
> CPU type name format is <TARGET>_CPU_TYPE_NAME("%s"), which boils down
> to:
>
> - arm lm32 m68k moxie riscv s390x tricore unicore32 xtensa
> "%s-<TARGET>-cpu"
>
> - openrisc
> "%s-or1k-cpu"
>
> - i386
> "%s-x86_64-cpu" #ifdef TARGET_X86_64
> "%s-i386-cpu" #else
>
> - mips
> "%s-mips64-cpu" #ifdef TARGET_MIPS64
> "%s-mips-cpu" #else
>
> The %s gets replaced by the user's cpu model.
>
> * hppa microblaze nios2 tilegx
>
> CPU type name format is <TARGET>-cpu. The user's cpu model seems
> silently ignored.
>
> * alpha cris ppc sh4 sparc
>
> No format, using ->class_by_name()
>
> - alpha
>
> CPU type name format is "%s-alpha-cpu".
>
> alpha_cpu_class_by_name() recognizes the full name, the full name
> without "-alpha-cpu" suffix, and a bunch of aliases.
>
> - cris
>
> CPU type name format is "%s-cris-cpu".
>
> cris_cpu_class_by_name() recognizes the name without the "-cris-cpu"
> suffix, plus "any" as alias for "crisv32-cris-cpu" #ifdef
> CONFIG_USER_ONLY (this is the default CPU type for machine
> "axis-dev88"; the other machine "none" has no default).
>
> - ppc
>
> CPU type name format is
> "%s-powerpc64-cpu" #ifdef TARGET_PPC64
> "%s-powerpc-cpu" #else
>
> ppc_cpu_class_by_name() recognizes the name without the suffix, plus
> the CPU type's PVR (8 digit hex number), plus a bunch of (case
> insensitive) aliases.
>
> - sh4
>
> CPU type name format is "%s-superh-cpu".
>
> superh_cpu_class_by_name() recognizes the name without the suffix,
> plus "any" as alias for "sh7750r-superh-cpu" (this is the default
> CPU type for machine "shix"; machines "r2d" defaults to "sh7751r",
> and "none" has no default).
>
> - sparc
>
> CPU type name format is
> "%s-sparc64-cpu" #ifdef TARGET_SPARC64
> "%s-sparc-cpu" #else
>
> sparc_cpu_class_by_name() recognizes the name without the suffix,
> mapping any spaces in the user's cpu model to '-'.
>
> Observations:
>
> * The CPU type name format is generally "%s-T-cpu", where T is either
> <TARGET> or <TARGET>64.
>
> Exceptions:
>
> - openrisc, sh4 uses or1k, superh instead. Looks pointless to me.
>
> - i386 uses x86_64 instead of i38664. Makes sense.
>
> - hppa, microblaze, nios2 and tilegx use CPU type name format "T-cpu",
> ignoring the user's cpu model. These exceptions looks pointless to
> me.
>
> * The user's CPU model is generally the "%s" part of the format.
>
> Exceptions:
>
> - alpha additionaly recognizes full type names. If that's useful for
> alpha (I'm not sure it is), why isn't it useful for all other
> targets?
>
> - cris and sh4 additionaly recognize an "any" alias, cris only #ifdef
> CONFIG_USER_ONLY.
>
> Until PATCH 4, arm also recognizes an "any" alias #ifdef
> CONFIG_USER_ONLY. PATCH 4 drops that, because it's redundant with
> the "any" CPU, which is a copy instead of an alias. Sure we want to
> do have different targets do "any" in different ways?
>
> See aliases below.
>
> - ppc additionaly recognizes PVR aliases and additional (case
> insensitive) aliases. Feels overengineered to me. See aliases
> below.
>
> - sparc additionally recognizes aliases with ' ' instead of '-'.
> Feels pointless to me. See aliases below.
>
> * What about deprecating pointless exceptions?
Last time I was refactoring all this CPU name thingy, there wasn't way to deprecate anything
so I had to keep it. But I'd support deprecation in there now.
The same applies to aliases, sometimes its code even too complicated (ppc).
I'd ditch it if possible.
(added in loop PPC folks for opinions)
>
> * Aliases
>
> We have several targets roll their own CPU name aliases code.
> Assuming aliases are here to stay (i.e. we're not deprecating all of
> them): what about letting each CPU type specify a set of aliases, so
> we can recognize them in generic code?
>
^ permalink raw reply [flat|nested] 28+ messages in thread
end of thread, other threads:[~2019-05-09 15:48 UTC | newest]
Thread overview: 28+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2019-04-19 6:14 [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 1/7] cpu: Change return type of cpu_class_by_name() to CPUClass Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 2/7] riscv: Don't split CPU model string Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 21:00 ` Alistair Francis
2019-04-19 21:00 ` Alistair Francis
2019-04-19 6:14 ` [Qemu-devel] [PATCH 3/7] arm: " Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 4/7] arm: Remove special case for "any" CPU model Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 6:14 ` [Qemu-devel] [PATCH 5/7] cpu: Let architectures set CPU class name format Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-05-06 11:42 ` Markus Armbruster
2019-05-08 5:52 ` Markus Armbruster
2019-04-19 6:14 ` [Qemu-devel] [PATCH 6/7] cpu: Set class name format for some architectures Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-04-19 20:59 ` Alistair Francis
2019-04-19 20:59 ` Alistair Francis
2019-04-19 6:14 ` [Qemu-devel] [PATCH 7/7] cpu: Set fixed class name on " Eduardo Habkost
2019-04-19 6:14 ` Eduardo Habkost
2019-05-06 11:53 ` [Qemu-devel] [PATCH 0/7] Delete 16 *_cpu_class_by_name() functions Markus Armbruster
2019-05-06 19:53 ` Eduardo Habkost
2019-05-08 8:34 ` Markus Armbruster
2019-05-08 19:46 ` Eduardo Habkost
2019-05-09 5:55 ` Markus Armbruster
2019-05-09 15:46 ` Igor Mammedov
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