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From: Richard Henderson <richard.henderson@linaro.org>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [PATCH v2 05/29] tcg: Assert fixed_reg is read-only
Date: Tue, 30 Apr 2019 22:05:12 -0700	[thread overview]
Message-ID: <20190501050536.15580-6-richard.henderson@linaro.org> (raw)
In-Reply-To: <20190501050536.15580-1-richard.henderson@linaro.org>

The only fixed_reg is cpu_env, and it should not be modified
during any TB.  Therefore code that tries to special-case moves
into a fixed_reg is dead.  Remove it.

Reviewed-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 tcg/tcg.c | 87 +++++++++++++++++++++++++------------------------------
 1 file changed, 40 insertions(+), 47 deletions(-)

diff --git a/tcg/tcg.c b/tcg/tcg.c
index f7bef51de8..70ca113c26 100644
--- a/tcg/tcg.c
+++ b/tcg/tcg.c
@@ -3274,11 +3274,8 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGTemp *ots,
                                   tcg_target_ulong val, TCGLifeData arg_life,
                                   TCGRegSet preferred_regs)
 {
-    if (ots->fixed_reg) {
-        /* For fixed registers, we do not do any constant propagation.  */
-        tcg_out_movi(s, ots->type, ots->reg, val);
-        return;
-    }
+    /* ENV should not be modified.  */
+    tcg_debug_assert(!ots->fixed_reg);
 
     /* The movi is not explicitly generated here.  */
     if (ots->val_type == TEMP_VAL_REG) {
@@ -3314,6 +3311,9 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
     ots = arg_temp(op->args[0]);
     ts = arg_temp(op->args[1]);
 
+    /* ENV should not be modified.  */
+    tcg_debug_assert(!ots->fixed_reg);
+
     /* Note that otype != itype for no-op truncation.  */
     otype = ots->type;
     itype = ts->type;
@@ -3338,7 +3338,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
     }
 
     tcg_debug_assert(ts->val_type == TEMP_VAL_REG);
-    if (IS_DEAD_ARG(0) && !ots->fixed_reg) {
+    if (IS_DEAD_ARG(0)) {
         /* mov to a non-saved dead register makes no sense (even with
            liveness analysis disabled). */
         tcg_debug_assert(NEED_SYNC_ARG(0));
@@ -3351,7 +3351,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op)
         }
         temp_dead(s, ots);
     } else {
-        if (IS_DEAD_ARG(1) && !ts->fixed_reg && !ots->fixed_reg) {
+        if (IS_DEAD_ARG(1) && !ts->fixed_reg) {
             /* the mov can be suppressed */
             if (ots->val_type == TEMP_VAL_REG) {
                 s->reg_to_temp[ots->reg] = NULL;
@@ -3504,6 +3504,10 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
             arg = op->args[i];
             arg_ct = &def->args_ct[i];
             ts = arg_temp(arg);
+
+            /* ENV should not be modified.  */
+            tcg_debug_assert(!ts->fixed_reg);
+
             if ((arg_ct->ct & TCG_CT_ALIAS)
                 && !const_args[arg_ct->alias_index]) {
                 reg = new_args[arg_ct->alias_index];
@@ -3512,29 +3516,21 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
                                     i_allocated_regs | o_allocated_regs,
                                     op->output_pref[k], ts->indirect_base);
             } else {
-                /* if fixed register, we try to use it */
-                reg = ts->reg;
-                if (ts->fixed_reg &&
-                    tcg_regset_test_reg(arg_ct->u.regs, reg)) {
-                    goto oarg_end;
-                }
                 reg = tcg_reg_alloc(s, arg_ct->u.regs, o_allocated_regs,
                                     op->output_pref[k], ts->indirect_base);
             }
             tcg_regset_set_reg(o_allocated_regs, reg);
-            /* if a fixed register is used, then a move will be done afterwards */
-            if (!ts->fixed_reg) {
-                if (ts->val_type == TEMP_VAL_REG) {
-                    s->reg_to_temp[ts->reg] = NULL;
-                }
-                ts->val_type = TEMP_VAL_REG;
-                ts->reg = reg;
-                /* temp value is modified, so the value kept in memory is
-                   potentially not the same */
-                ts->mem_coherent = 0;
-                s->reg_to_temp[reg] = ts;
+            if (ts->val_type == TEMP_VAL_REG) {
+                s->reg_to_temp[ts->reg] = NULL;
             }
-        oarg_end:
+            ts->val_type = TEMP_VAL_REG;
+            ts->reg = reg;
+            /*
+             * Temp value is modified, so the value kept in memory is
+             * potentially not the same.
+             */
+            ts->mem_coherent = 0;
+            s->reg_to_temp[reg] = ts;
             new_args[i] = reg;
         }
     }
@@ -3550,10 +3546,10 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op)
     /* move the outputs in the correct register if needed */
     for(i = 0; i < nb_oargs; i++) {
         ts = arg_temp(op->args[i]);
-        reg = new_args[i];
-        if (ts->fixed_reg && ts->reg != reg) {
-            tcg_out_mov(s, ts->type, ts->reg, reg);
-        }
+
+        /* ENV should not be modified.  */
+        tcg_debug_assert(!ts->fixed_reg);
+
         if (NEED_SYNC_ARG(i)) {
             temp_sync(s, ts, o_allocated_regs, 0, IS_DEAD_ARG(i));
         } else if (IS_DEAD_ARG(i)) {
@@ -3674,26 +3670,23 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op)
     for(i = 0; i < nb_oargs; i++) {
         arg = op->args[i];
         ts = arg_temp(arg);
+
+        /* ENV should not be modified.  */
+        tcg_debug_assert(!ts->fixed_reg);
+
         reg = tcg_target_call_oarg_regs[i];
         tcg_debug_assert(s->reg_to_temp[reg] == NULL);
-
-        if (ts->fixed_reg) {
-            if (ts->reg != reg) {
-                tcg_out_mov(s, ts->type, ts->reg, reg);
-            }
-        } else {
-            if (ts->val_type == TEMP_VAL_REG) {
-                s->reg_to_temp[ts->reg] = NULL;
-            }
-            ts->val_type = TEMP_VAL_REG;
-            ts->reg = reg;
-            ts->mem_coherent = 0;
-            s->reg_to_temp[reg] = ts;
-            if (NEED_SYNC_ARG(i)) {
-                temp_sync(s, ts, allocated_regs, 0, IS_DEAD_ARG(i));
-            } else if (IS_DEAD_ARG(i)) {
-                temp_dead(s, ts);
-            }
+        if (ts->val_type == TEMP_VAL_REG) {
+            s->reg_to_temp[ts->reg] = NULL;
+        }
+        ts->val_type = TEMP_VAL_REG;
+        ts->reg = reg;
+        ts->mem_coherent = 0;
+        s->reg_to_temp[reg] = ts;
+        if (NEED_SYNC_ARG(i)) {
+            temp_sync(s, ts, allocated_regs, 0, IS_DEAD_ARG(i));
+        } else if (IS_DEAD_ARG(i)) {
+            temp_dead(s, ts);
         }
     }
 }
-- 
2.17.1

  parent reply	other threads:[~2019-05-01  5:05 UTC|newest]

Thread overview: 114+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-05-01  5:05 [Qemu-devel] [PATCH v2 00/29] tcg vector improvements Richard Henderson
2019-05-01  5:05 ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 01/29] tcg: Implement tcg_gen_gvec_3i() Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 15:23   ` Alex Bennée
2019-05-01 15:23     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 02/29] tcg: Do not recreate INDEX_op_neg_vec unless supported Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 15:26   ` Alex Bennée
2019-05-01 15:26     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 03/29] tcg: Allow add_vec, sub_vec, neg_vec, not_vec to be expanded Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 15:56   ` Alex Bennée
2019-05-01 15:56     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 04/29] tcg: Specify optional vector requirements with a list Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 17:24   ` Alex Bennée
2019-05-01 17:24     ` Alex Bennée
2019-05-01  5:05 ` Richard Henderson [this message]
2019-05-01  5:05   ` [Qemu-devel] [PATCH v2 05/29] tcg: Assert fixed_reg is read-only Richard Henderson
2019-05-01 17:26   ` Alex Bennée
2019-05-01 17:26     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 06/29] tcg: Return bool success from tcg_out_mov Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 17:29   ` Alex Bennée
2019-05-01 17:29     ` Alex Bennée
2019-05-01 20:31     ` Richard Henderson
2019-05-01 20:31       ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 07/29] tcg: Support cross-class moves without instruction support Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 17:34   ` Alex Bennée
2019-05-01 17:34     ` Alex Bennée
2019-05-01 20:18     ` Richard Henderson
2019-05-01 20:18       ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 08/29] tcg: Promote tcg_out_{dup, dupi}_vec to backend interface Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 17:37   ` Alex Bennée
2019-05-01 17:37     ` Alex Bennée
2019-05-01 20:21     ` Richard Henderson
2019-05-01 20:21       ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 09/29] tcg: Manually expand INDEX_op_dup_vec Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02  9:42   ` Alex Bennée
2019-05-02  9:42     ` Alex Bennée
2019-05-02 15:24     ` Richard Henderson
2019-05-02 15:24       ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 10/29] tcg: Add tcg_out_dupm_vec to the backend interface Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 11/29] tcg/i386: Implement tcg_out_dupm_vec Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 12/29] tcg/aarch64: " Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 13:26   ` Alex Bennée
2019-05-02 13:26     ` Alex Bennée
2019-05-02 15:35     ` Richard Henderson
2019-05-02 15:35       ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 13/29] tcg: Add INDEX_op_dup_mem_vec Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 13:30   ` Alex Bennée
2019-05-02 13:30     ` Alex Bennée
2019-05-02 15:38     ` Richard Henderson
2019-05-02 15:38       ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 14/29] tcg: Add gvec expanders for variable shift Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 14:08   ` Alex Bennée
2019-05-02 14:08     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 15/29] tcg/i386: Support vector variable shift opcodes Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 16/29] tcg/aarch64: " Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 14:12   ` Alex Bennée
2019-05-02 14:12     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 17/29] tcg: Add gvec expanders for vector shift by scalar Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 14:37   ` Alex Bennée
2019-05-02 14:37     ` Alex Bennée
2019-05-02 15:46     ` Richard Henderson
2019-05-02 15:46       ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 18/29] tcg/i386: Support vector scalar shift opcodes Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 19/29] tcg: Add support for integer absolute value Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 15:25   ` Alex Bennée
2019-05-02 15:25     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 20/29] tcg: Add support for vector " Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 15:47   ` Alex Bennée
2019-05-02 15:47     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 21/29] tcg/i386: Support " Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 22/29] tcg/aarch64: " Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 15:49   ` Alex Bennée
2019-05-02 15:49     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 23/29] target/arm: Use tcg_gen_abs_i64 and tcg_gen_gvec_abs Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 16:07   ` [Qemu-devel] [Qemu-arm] " Alex Bennée
2019-05-02 16:07     ` Alex Bennée
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 24/29] target/cris: Use tcg_gen_abs_tl Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 25/29] target/ppc: Use tcg_gen_abs_i32 Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 26/29] target/ppc: Use tcg_gen_abs_tl Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 27/29] target/s390x: Use tcg_gen_abs_i64 Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-02 13:44   ` David Hildenbrand
2019-05-02 13:44     ` David Hildenbrand
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 28/29] target/tricore: Use tcg_gen_abs_tl Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01  5:05 ` [Qemu-devel] [PATCH v2 29/29] target/xtensa: Use tcg_gen_abs_i32 Richard Henderson
2019-05-01  5:05   ` Richard Henderson
2019-05-01 15:15   ` Max Filippov
2019-05-01 15:15     ` Max Filippov

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